P89LPC916FDH NXP Semiconductors, P89LPC916FDH Datasheet - Page 55

• Manufacturer Part Number: P89LPC916FDH
• Description: MCU 8BIT 80C51 2K FLASH, TSSOP16
• Manufacturer: NXP Semiconductors

Specifications of P89LPC916FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 14
• Program Memory Size: 2KB
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• Digital Ic: RoHS Compliant

NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
9.4.4 Auto scan, continuous conversion mode
9.4.5 Dual channel, continuous conversion mode
9.4.6 Single step mode
9.5.1 Timer triggered start
9.5.2 Start immediately
9.5.3 Edge triggered
9.5 Conversion start modes
9.6 Boundary limits interrupt
Any combination of the four input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register which
corresponds to the selected input channel. An interrupt, if enabled, will be generated after
all selected channels have been converted. The process will repeat starting with the first
selected channel. Additional conversion results will again cycle through the four result
registers, overwriting the previous results.Continous conversions continue until terminated
by the user.
This is a variation of the auto scan continuous conversion mode where conversion occurs
on two user-selectable inputs. The result of the conversion of the first channel is placed in
result register, AD1DAT0. The result of the conversion of the second channel is placed in
result register, AD1DAT1. The first channel is again converted and its result stored in
AD1DAT2. The second channel is again converted and its result placed in AD1DAT3. An
interrupt is generated, if enabled, after every set of four conversions (two conversions per
channel).
This special mode allows ‘single-stepping’ in an auto scan conversion mode. Any
combination of the four input channels can be selected for conversion. After each channel
is converted, an interrupt is generated, if enabled, and the A/D waits for the next start
condition. May be used with any of the start modes.
An A/D conversion is started by the overflow of Timer 0. Once a conversion has started,
additional Timer 0 triggers are ignored until the conversion has completed. The Timer
triggered start mode is available in all A/D operating modes.
Programming this mode immediately starts a conversion.This start mode is available in all
A/D operating modes.
An A/D conversion is started by rising or falling edge of P1.4. Once a conversion has
started, additional edge triggers are ignored until the conversion has completed. The edge
triggered start mode is available in all A/D operating modes.
The A/D converter has both a high and low boundary limit register. After the four MSBs
have been converted, these four bits are compared with the four MSBs of the boundary
high and low registers. If the four MSBs of the conversion are outside the limit an interrupt
will be generated, if enabled. If the conversion result is within the limits, the boundary
limits will again be compared after all 8 bits have been converted. An interrupt will be
generated, if enabled, if the result is outside the boundary limits. The boundary limit may
be disabled by clearing the boundary limit interrupt enable.
Rev. 05 — 15 December 2009
8-bit microcontrollers with accelerated two-clock 80C51 core
P89LPC915/916/917
© NXP B.V. 2009. All rights reserved.
55 of 75