P89LPC916FDH NXP Semiconductors, P89LPC916FDH Datasheet - Page 62

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P89LPC916FDH

Manufacturer Part Number
P89LPC916FDH
Description
MCU 8BIT 80C51 2K FLASH, TSSOP16
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC916FDH

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
14
Program Memory Size
2KB
Ram Memory Size
256Byte
Cpu Speed
18MHz
Oscillator Type
Internal Only
No. Of Timers
4
Digital Ic
RoHS Compliant

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NXP Semiconductors
Table 17.
V
T
P89LPC915_916_917_5
Product data sheet
Symbol
f
f
f
Glitch filter
t
t
External clock
f
T
t
t
t
t
Shift register (UART mode 0)
T
t
t
t
t
SPI interface
f
T
t
t
osc(RC)
osc(WD)
CLKLP
gr
sa
osc
CHCX
CLCX
CLCH
CHCL
QVXH
XHQX
XHDX
XHDV
SPI
SPILEAD
SPILAG
amb
DD
cy(clk)
XLXL
SPICYC
= 3.0 V to 3.6 V unless otherwise specified.
= 40 C to +85 C, or 40 C to +125 C (see
Dynamic characteristics (18 MHz)
Parameter
internal RC oscillator frequency industrial
internal watchdog oscillator
frequency
low power select clock
frequency
glitch rejection time
signal acceptance time
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
clock rise time
clock fall time
serial port clock cycle time
output data set-up to clock
rising edge time
output data hold after clock
rising edge time
input data hold after clock rising
edge time
input data valid to clock rising
edge time
SPI operating frequency
SPI cycle time
SPI enable lead time
SPI enable lag time
slave
master
slave
master
slave
Conditions
extended
P1.5/RST pin
any pin except
P1.5/RST
P1.5/RST pin
any pin except
P1.5/RST
see
see
see
see
see
see
see
see
see
see
see
25,
see
see
Rev. 05 — 15 December 2009
26
Figure 28
Figure 28
Figure 28
Figure 28
Figure 28
Figure 27
Figure 27
Figure 27
Figure 27
Figure 27
Figure
Figure
Figure
Table 3 on page
8-bit microcontrollers with accelerated two-clock 80C51 core
23, 24,
25,
25,
26
26
3), unless otherwise specified.
16T
13T
6
4
7.189
7.004
Min
320
125
150
250
250
CCLK
CCLK
50
55
22
22
cy(CLK)
cy(CLK)
0
0
0
-
-
-
-
-
-
-
P89LPC915/916/917
Variable clock
T
T
cy(CLK)
cy(CLK)
T
cy(CLK)
CCLK
CCLK
7.557
7.741
Max
520
50
15
18
8
5
5
0
-
-
-
-
-
-
-
-
-
-
+ 20
6
4
t
t
CHCX
CLCX
[1][2]
f
7.189
7.004
osc
Min
320
125
888
722
150
333
222
250
250
50
22
22
© NXP B.V. 2009. All rights reserved.
0
-
-
-
-
-
-
-
-
-
-
= 18 MHz Unit
7.557 MHz
7.741 MHz
Max
520
3.0
4.5
50
15
75
5
5
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
62 of 75
kHz
MHz
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns

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