PIC16F872-E/SS Microchip Technology, PIC16F872-E/SS Datasheet - Page 177

• Manufacturer Part Number: PIC16F872-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F872-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 22
• Interface Type: I2C/SPI
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.6.2
1997 Microchip Technology Inc.
Initialization
Since Timer0 has a software programmable clock source, there are two examples to show the
initialization of Timer0 with each source.
clock source (timer mode), while
source (counter mode).
Example 11-3: Timer0 Initialization (Internal Clock Source)
Example 11-4: Timer0 Initialization (External Clock Source)
;**
;**
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
;** BSF
;** BSF
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BTFSS
GOTO
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BSF
BSF
BTFSS
GOTO
TMR0
INTCON
STATUS, RP0
0x37
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
TMR0
INTCON
STATUS, RP0
0xC3
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are enabled,
;
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Example 11-4
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are disabled,
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Interrupt on falling edge of RB0
Timer0 increment from external clock
on the high-to-low transition of T0CKI
with a prescaler of 1:256.
Interrupt on rising edge of RB0
Timer0 increment from internal clock
with a prescaler of 1:16.
Example 11-3
Section 11. Timer0
shows the initialization for the external clock
shows the initialization for the internal
DS31011A-page 11-9
11