PIC16F872-E/SS Microchip Technology, PIC16F872-E/SS Datasheet - Page 340

• Manufacturer Part Number: PIC16F872-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F872-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Package: 28SSOP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 22
• Interface Type: I2C/SPI
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
DS31018A-page 18-4
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 18-2: RCSTA: Receive Status and Control Register
bit 7
SPEN: Serial Port Enable bit
1 = Serial port enabled (Configures RX/DT and TX/CK pins as serial port pins)
0 = Serial port disabled
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode
Don’t care
Synchronous mode - master
1 = Enables single receive
0 = Disables single receive
Synchronous mode - slave
Unused in this mode
CREN: Continuous Receive Enable bit
Asynchronous mode
1 = Enables continuous receive
0 = Disables continuous receive
Synchronous mode
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
Unimplemented: Read as '0'
FERR: Framing Error bit
1 = Framing error (Can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (Can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: 9th bit of received data, can be parity bit.
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
R/W-0
SPEN
This bit is cleared after reception is complete.
R/W-0
RX9
W = Writable bit
R/W-0
SREN
CREN
R/W-0
- n = Value at POR reset
U-0
—
FERR
R-0
1997 Microchip Technology Inc.
OERR
R-0
bit 0
RX9D
R-0