PIC16F872-E/SS Microchip Technology, PIC16F872-E/SS Datasheet - Page 445

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PIC16F872-E/SS

Manufacturer Part Number
PIC16F872-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F872-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI
On-chip Adc
5-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
24.2
1997 Microchip Technology Inc.
Control Registers
bit 7-4:
bit 3:
bit 2:
bit 1:
bit 0:
Two A/D control registers are provided to control the conversion process. They are ADCON0 and
ADCON1. Both registers are readable and writable.
Register 24-1: ADCON0 Register
ADCS3:ADCS0: Analog Channel Select bits
0000 = AN0 input
0001 = AN1 input
0010 = AN2 input
0011 = AN3 input
0100 = Bandgap reference voltage input
0101 = Slope reference SREFHI input
0110 = Slope reference SREFLO input
0111 = AN11 input
1000 = AN12 input
1001 = AN13 input
1010 = AN4 input
1011 = AN5 input
1100 = AN6 input
1101 = AN7 input
1110 = AN14 input
1111 = AN15 input
Unimplemented: Read as '0'
AMUXOE: Analog MUX Output Enable
1 = Connect AMUX Output to AN0 pin (overrides TRIS setting)
0 = AN0 pin normal
ADRST: A/D Reset Control Bit
1 = Stop the A/D Timer, discharge CDAC capacitor
0 = Normal operation (A/D running)
ADZERO: A/D Zero Select Control
1 = Enable zeroing operation on AN1 and AN5
0 = Normal operation, sample AN1 and AN5 pins
bit 7
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
ADCS3
R/W-0
Note:
For devices that do not use the full 16 A/D input channels, the unimplemented selec-
tions are reserved. Do not select any unimplemented channels.
ADCS2
R/W-0
W = Writable bit
ADCS1
R/W-0
Section 24. Slope A/D
ADCS0
R/W-0
U-0
- n = Value at POR reset
AMUXOE
R/W-0
ADRST
R/W-1
DS31024A-page 24-3
bit 0
ADZERO
R/W-0
24

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