PIC16F872-E/SS Microchip Technology, PIC16F872-E/SS Datasheet - Page 332

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PIC16F872-E/SS

Manufacturer Part Number
PIC16F872-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F872-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI
On-chip Adc
5-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
17.5
DS31017A-page 17-56
Connection Considerations for I
For standard-mode I
on the following parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices (input current + leakage current)
The supply voltage limits the minimum value of resistor R
current of 3 mA at V
age of V
function of R
limits the maximum value of R
tibility.
The bus capacitance is the total capacitance of wire, connections, and pins. This capacitance lim-
its the maximum value of R
The SMP bit is the slew rate control enabled bit. This bit is in the SSPSTAT register, and controls
the slew rate of the I/O pins when in I
Figure 17-42: Sample Device Configuration for I
NOTE: I
DD
= 5V+10% and V
P
line to which the pull up resistor is also connected.
is shown in Figure 17-42. The desired noise margin of 0.1V
2
C devices with input levels related to V
OLMAX
SDA
SCL
2
C bus devices, the values of resistors R
R
= 0.4V for the specified output stages. For example, with a supply volt-
P
P
2
Preliminary
C Bus
OLMAX
due to the specified rise time
S
. Series resistors are optional, and used to improve ESD suscep-
R
P
= 0.4V at 3 mA, R
2
C mode (master or slave).
R
S
V
DD
DEVICE
R
+ 10%
S
2
C Bus
PMIN
DD
must have one common supply
P
(Figure
= (5.5-0.4)/0.003 = 1.7 k
due to the specified minimum sink
P
and R
17-42).
1997 Microchip Technology Inc.
S
in
Figure 17-42
DD
C
B
for the low level,
= 10 - 400 pF
V
depends
DD
as a

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