PIC16F872-E/SS Microchip Technology, PIC16F872-E/SS Datasheet - Page 262

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PIC16F872-E/SS

Manufacturer Part Number
PIC16F872-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F872-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI
On-chip Adc
5-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
16.3.6
DS31016A-page 16-12
SCK
(CKP = 0)
SCK
(CKP = 1)
SS
SSPIF
SDO
SDI
Slave Select Mode
The SS pin allows a synchronous slave mode. The SPI must be in slave mode
(SSPCON<3:0> = 04h) and the TRIS bit must be set the for the synchronous slave mode to be
enabled. When the SS pin is low, transmission and reception are enabled and the SDO pin is
driven. When the SS pin goes high, the SDO pin is no longer driven, even if in the middle of a
transmitted byte, and becomes a floating output. If the SS pin is taken low without resetting SPI
mode, the transmission will continue from the point at which it was taken high. To clear the bit
counter the Basic SSP module must be disabled and then re-enabled. External pull-up/pull-down
resistors may be desirable, depending on the application.
To emulate two-wire communication, the SDO pin can be connected to the SDI pin. When the
SPI needs to operate as a receiver the SDO pin can be configured as an input. This disables
transmissions from the SDO. The SDI can always be left as an input (SDI function) since it cannot
create a bus conflict.
Figure 16-5: SPI Mode Waveform (Slave Mode with ss Control)
bit7
bit7
bit6
bit5
bit4
bit3
bit2
Next Q4 Cycle
after Q2
1997 Microchip Technology Inc.
bit1
bit0
bit0

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