SK-86R01 Fujitsu, SK-86R01 Datasheet - Page 44

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SK-86R01

Manufacturer Part Number
SK-86R01
Description
KIT, STARTER, JADE, MB86R01
Manufacturer
Fujitsu
Type
Evaluation Boardr
Datasheet

Specifications of SK-86R01

Kit Contents
A Base Board, A Graphics Subboard, A Video Extension Input Board, A Video Extension Output Board
Mcu Supported Families
MB86R01
Silicon Manufacturer
Fujitsu
Core Architecture
ARM
Core Sub-architecture
ARM926EJ-S
Features
Built-in SRAM, Remap/Boot Control Function
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FUJITSU MICROELECTRONICS
PROPRIETARY AND CONFIDENTIAL
MB86R01 DATA SHEET
8.3.
8.3.1.
Follow the power on/off sequence as shown below:
There is no limitation on the sequence of power on/off of VDDI, VDDE, and DDRVDE if the following
condition is met. (Figure 8-2)
Perform power on/off for VREF according to the DDR2-SDRAM regulation.
Perform power on/off so that power for PLLVDD (PLL) does not exceed VDDI.
Turn on all power. Turning on only a part of them is prohibited.
CMOS IC becomes unstable immediately after power-on so that proceed reset immediately.
Set the reset pins (XTRST and XRST) to Low when power-on.
Input clock to CLK pin immediately after power-on.
It requires at least 100 clocks (input clock to CLK pin) for the reset signal "L" applied to the XRST pin to
be transmitted to all internal circuits.
• Do not apply VDDE and DDRVDE (external) continuously more than 1 second when VDDI (internal)
<ON>: VDDI (internal and PLLVDD) → DDRVDE (external) → VDDE (external) → Signal
<OFF>: Signal → VDDE (external) → DDRVDE (external) → VDDI (internal and PLLVDD)
is off.
Precautions at Power On
Recommended Power On/Off Sequence
DDRVDE
VDDE
VDDI
VDDE
DDRVDE
VDDI
Figure 8-1 Recommended Power On/Off Sequence (1)
Figure 8-2 Recommended Power On/Off Sequence (2)
1 sec. or less
38
1 sec. or less

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