IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 132

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

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Frame Buffer
Video and Image Processing Suite User Guide
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The Deinterlacer II gives you the option to detect a 3:2 cadence in the input video
sequence and perform a reverse telecine operation for perfect restoration of the
original progressive content. You can switch off the cadence detector at run time when
you enable the slave interface.
When the Deinterlacer II detects a cadence, it maintains the output frame rate at twice
the input frame rate. For example, the Deinterlacer II reconstructs a
24 frames-per-second progressive film that is converted and transmitted at
60 fields-per-seconds to a 60 frames-per-second progressive output. The
Deinterlacer II repeats the progressive frames of the original content to match the new
frame rate.
The Frame Buffer MegaCore function buffers progressive or interlaced video fields in
external RAM. When frame dropping and frame repeating are not allowed, the Frame
Buffer provides a double-buffering function that can be useful to solve throughput
issues in the data path. When frame dropping and/or frame repeating are allowed,
the Frame Buffer provides a triple-buffering function and can be used to perform
simple frame rate conversion.
The Frame Buffer is built with two basic blocks: a writer which stores input pixels in
memory and a reader which retrieves video frames from the memory and outputs
them.
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The Deinterlacer II only allows one output frame for one input field. The
Deinterlacer II uses each interlaced field to construct a deinterlaced frame, which
effectively doubles the frame rate.
The Deinterlacer II does not store the Avalon-ST video user packets in the memory,
and directly propagates the user packets to the output. However, it does not
propagate the receive control packets. The Deinterlacer II builds and sends a new
control packet before each output frame.
You may face throughput issues when you swap the Deinterlacer with the
Deinterlacer II in your designs. You can easily fix the throughput issues by
instantiating the
Frame Buffer
MegaCore function into the designs.
Chapter 5: Functional Descriptions
May 2011 Altera Corporation
Frame Buffer