APA-EVAL-KIT Actel, APA-EVAL-KIT Datasheet - Page 58

• Manufacturer Part Number: APA-EVAL-KIT
• Description: MCU, MPU & DSP Development Tools ProAsic Plus Eval Kit
• Manufacturer: Actel

Specifications of APA-EVAL-KIT

• Processor To Be Evaluated: APA
• Interface Type: ISP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Global Input Buffer Delays
Table 2-39 • Worst-Case Commercial Conditions
Table 2-40 • Worst-Case Commercial Conditions
2 -4 8
Macro Type
GL33
GL33S
PECL
Notes:
1. t
2. t
3. Applies to Military ProASIC
4. LVTTL delays are the same as CMOS delays.
5. For LP Macros, V
Macro Type
GL25LP
GL25LPS
Notes:
1. t
2. t
3. Applies to Military ProASIC
4. LVTTL delays are the same as CMOS delays.
5. For LP Macros, V
ProASIC
INYH
INYL
INYH
INYL
= Input Pad-to-Y Low
= Input Pad-to-Y Low
= Input Pad-to-Y High
= Input Pad-to-Y High
PLUS
V
V
DDP
DDP
3.3 V, CMOS Input Levels
3.3 V, CMOS Input Levels
PPECL Input Levels
2.5 V, CMOS Input Levels
2.5 V, CMOS Input Levels
Flash Family FPGAs
= 3.0 V, V
= 2.3 V, V
DDP
DDP
= 2.3 V for delays.
= 2.3 V for delays.
DD
DD
PLUS
PLUS
= 2.3 V, T
= 2.3 V, T
devices.
devices.
4
4
4
4
, No Pull-up Resistor
, No Pull-up Resistor, Schmitt Trigger
, Low Power
, Low Power, Schmitt Trigger
J
J
Description
Description
= 70°C
= 70°C
v5.9
Max. t
Max. t
Std.
Std.
1.1
1.3
1.0
1.0
1.0
INYH
INYH
3
3
1
1
Max. t
Max. t
Std.
Std.
1.0
1.0
1.1
1.1
1.1
INYL
INYL
3
3
2
2
Units
Units
ns
ns
ns
ns
ns