APA-EVAL-KIT Actel, APA-EVAL-KIT Datasheet - Page 74
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APA-EVAL-KIT
Manufacturer Part Number
APA-EVAL-KIT
Description
MCU, MPU & DSP Development Tools ProAsic Plus Eval Kit
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA-EVAL-KIT
Processor To Be Evaluated
APA
Interface Type
ISP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Synchronous Write and Asynchronous Read to the Same Location
Note: The plot shows the normal operation status.
Figure 2-37 • Synchronous Write and Asynchronous Read to the Same Location
Table 2-61 • T
2 -6 4
Symbol t
ORDA
ORDH
OWRA
OWRH
RAWCLKS
RAWCLKH
Notes:
1. During an asynchronous read cycle, each write operation (synchronous or asynchronous) to the same location will automatically
2. Violation of RAWCLKS will disturb access to OLD data.
3. Violation of RAWCLKH will disturb access to NEWER data.
ProASIC
trigger a read operation which updates the read data.
PLUS
xxx
T
J
J
RB, RADDR
Flash Family FPGAs
= 0°C to 110°C; V
= –55°C to 150°C, V
New DO access from RB ↓
Old DO valid from RB ↓
New DO access from WCLKS ↓
Old DO valid from WCLKS ↓
RB ↓ or RADDR from WCLKS ↑
RB ↑ or RADDR from WCLKS ↓
WCLKS
t
RAWCLKS
t
t
DO
ORDH
ORDA
DD
Description
DD
= 2.3 V to 2.7 V for Commercial/Industrial
= 2.3 V to 2.7 V for Military/MIL-STD-883
OLD
v5.9
Min.
7.5
3.0
5.0
5.0
t
OWRH
t
Max.
OWRA
3.0
0.5
NEWNEWER
Units
t
RAWCLKH
ns
ns
ns
ns
ns
ns
Notes
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