ADUC7121BBCZ-RL Analog Devices Inc, ADUC7121BBCZ-RL Datasheet - Page 49
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ADUC7121BBCZ-RL
Manufacturer Part Number
ADUC7121BBCZ-RL
Description
PRECISION ANALOG MCU I.C
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7121BBCZ.pdf
(96 pages)
Specifications of ADUC7121BBCZ-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
41.78MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
126KB (63K x 16)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x12b, D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-10°C ~ 95°C
Package / Case
108-LFBGA, CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADUC7121BBCZ-RL
ADUC7121BBCZ-RLTR
ADUC7121BBCZ-RLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7121BBCZ-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
MMRs and Keys
To prevent accidental programming, a certain sequence must be
followed when writing in the PLLCON and POWCON registers
(see Table 67).
PLLKEYx Registers
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
PLLCON Register
Name:
Address:
Default value:
Access:
Table 65. PLLCON MMR Bit Designations
Bit
7:6
5
4:2
1:0
Value
00
01
10
11
Name
OSEL
MDCLK
PLLKEY1
0xFFFF0410
0x0000
Write only
PLLKEY2
0xFFFF0418
0x0000
Write only
PLLCON
0xFFFF0414
0x21
Read and write
Description
Reserved.
32 kHz PLL input selection.
Set by the user to use the internal
32 kHz oscillator.
Set by default.
Cleared by the user to use the external
32 kHz crystal.
Reserved.
Clocking modes.
Reserved.
PLL. Default configuration.
Reserved.
External clock on the
P1.4/PWM1/ECLK/XCLK/PLAI[8] pin.
Rev. 0 | Page 49 of 96
POWKEYx Registers
Name:
Address:
Default value:
Access:
Name:
Address:
Default value:
Access:
POWCON Register
Name:
Address:
Default value:
Access:
Table 66. POWCON MMR Bit Designations
Bit
7
6:4
3
2:0
Table 67. PLLCON and POWCON Write Sequence
PLLCON
PLLKEY1 = 0xAA
PLLCON = 0x01
PLLKEY2 = 0x55
Value
000
001
010
011
100
Others
000
001
010
011
100
101
110
111
Name
PC
RSVD
CD
POWKEY1
0xFFFF0404
0x0000
Write only
POWKEY2
0xFFFF040C
0x0000
Write only
POWCON
0xFFFF0408
0x0003
Read and write
Description
Reserved.
Operating modes.
Active mode.
Pause mode.
Nap mode.
Sleep mode. IRQ0 to IRQ3 and Timer2
can wake up the ADuC7121.
Stop mode.
Reserved.
Reserved.
CPU clock divider bits.
41.779200 MHz.
20.889600 MHz.
10.444800 MHz.
5.222400 MHz.
2.611200 MHz.
1.305600 MHz.
654.800 kHz.
326.400 kHz.
POWCON
POWKEY1 = 0x01
POWCON = user value
POWKEY2 = 0xF4
ADuC7121