EP2SGX90EF1152C3 Altera, EP2SGX90EF1152C3 Datasheet - Page 30

• Manufacturer Part Number: EP2SGX90EF1152C3
• Description: Stratix II GX
• Manufacturer: Altera

Transceivers
2–22
Stratix II GX Device Handbook, Volume 1
f
Control and Status Signals
The rx_enapatternalign signal is the FPGA control signal that
enables word alignment in non-automatic modes. The
rx_enapatternalign signal is not used in automatic modes (PCI
Express, XAUI, GIGE, CPRI, and Serial RapidIO).
In manual alignment mode, after the rx_enapatternalign signal is
activated, the rx_syncstatus signal goes high for one parallel clock
cycle to indicate that the alignment pattern has been detected and the
word boundary has been locked. If the rx_enapatternalign is
deactivated, the rx_syncstatus signal acts as a re-synchronization
signal to signify that the alignment pattern has been detected but not
locked on a different word boundary.
When using the synchronization state machine, the rx_syncstatus
signal indicates the link status. If the rx_syncstatus signal is high, link
synchronization is achieved. If the rx_syncstatus signal is low,
synchronization has not yet been achieved, or there were enough code
group errors to lose synchronization.
In some modes, the rx_enapatternalign signal can be configured to
operate as a rising edge signal.
For more information on manual alignment modes, refer to the
Stratix II GX Device
When the rx_enapatternalign signal is sensitive to the rising edge,
each rising edge triggers a new boundary alignment search, clearing the
rx_syncstatus signal.
The rx_patterndetect signal pulses high during a new alignment,
and also whenever the alignment pattern occurs on the current word
boundary.
SONET/SDH
In all the SONET/SDH modes, you can configure the word aligner to
either align to A1A2 or A1A1A2A2 patterns. Once the pattern is found,
the word boundary is aligned and the word aligner asserts the
rx_patterndetect signal for one clock cycle.
Handbook, volume 2.
Altera Corporation
October 2007