EP2SGX90EF1152C3 Altera, EP2SGX90EF1152C3 Datasheet - Page 35

• Manufacturer Part Number: EP2SGX90EF1152C3
• Description: Stratix II GX
• Manufacturer: Altera

Altera Corporation
October 2007
Figure 2–21. 8B/10B Decoder
The 8B/10B decoder in single-width mode translates the 10-bit encoded
data into the 8-bit equivalent data or control code. The 10-bit code
received must be from the supported Dx.y or Kx.y list with the proper
disparity or error flags asserted. All 8B/10B control signals, such as
disparity error or control detect, are pipelined with the data and
edge-aligned with the data.
decoded in the 8-bit data + 1-bit control indicator.
Figure 2–22. 8B/10B Decoder Conversion
The 8B/10B decoder in double-width mode translates the 20-bit
(2 × 10-bits) encoded code into the 16-bit (2 × 8-bits) equivalent data or
control code. The 20-bit upper and lower symbols received must be from
the supported Dx.y or Kx.y list with the proper disparity or error flags
To Byte
Deserializer
Parallel data
MSB received last
9
j
dataout[15..8]
Status Signals[1] (1)
dataout[7..0]
Status Signals[0]
h
8
H
7
g
7
G
6
(1)
Figure 2–22
8B/10B conversion
6
5
F
f
E
Stratix II GX Device Handbook, Volume 1
4
5
i
Decoder
Decoder
8B/10B
MSByte
8B/10B
LSByte
D
3
e
4
shows how the 10-bit symbol is
2
C
d
3
1
B
c
2
Stratix II GX Architecture
datain[19..10]
datain[9..0]
LSB received first
0
A
b
1
+
a
0
ctrl
From Rate
Matcher
2–27