EP3C5E144A7N Altera, EP3C5E144A7N Datasheet - Page 142
![Cyclone III](/photos/37/16/371628/144pin_eqfp_sml.jpg)
EP3C5E144A7N
Manufacturer Part Number
EP3C5E144A7N
Description
Cyclone III
Manufacturer
Altera
Datasheet
1.EP3C5E144A7N.pdf
(274 pages)
Specifications of EP3C5E144A7N
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
94
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
EQFP
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 142 of 274
- Download datasheet (6Mb)
7–18
Software Overview
Cyclone III Device Handbook, Volume 1
f
f
1
■
■
■
■
■
■
■
■
■
■
For more information about PCB layout guidelines, refer to
Layout Guidelines
Cyclone III device family high-speed I/O system interfaces are created in core logic
by a Quartus II software megafunction because they do not have a dedicated circuit
for the SERDES. The Cyclone III device family uses the I/O registers and LE registers
to improve the timing performance and support the SERDES. Altera Quartus II
software allows you to design your high-speed interfaces using the ALTLVDS
megafunction. This megafunction implements either a high-speed deserializer
receiver or a high-speed serializer transmitter. There is a list of parameters in the
ALTLVDS megafunction that you can set to customize your SERDES based on your
design requirements. The megafunction is optimized to use Cyclone III device family
resources to create high-speed I/O interfaces in the most effective manner.
When you are using the Cyclone III device family with the ALTLVDS megafunction,
the interface always sends the MSB of your parallel data first.
For more information about designing your high-speed I/O systems interfaces using
the ALTLVDS megafunction, refer to the
Quartus II
Use surface mount components.
Avoid 90° corners on board traces.
Use high-performance connectors.
Design backplane and card traces so that trace impedance matches the impedance
of the connector and termination.
Keep an equal number of vias for both signal traces.
Create equal trace lengths to avoid skew between signals. Unequal trace lengths
result in misplaced crossing points and decrease system margins as the
transmitter-channel-to-channel skew (TCCS) value increases.
Limit vias because they cause discontinuities.
Keep switching transistor-to-transistor logic (TTL) signals away from differential
signals to avoid possible noise coupling.
Do not route TTL clock signals to areas under or above the differential signals.
Analyze system-level signals.
Handbook.
and
AN 315: Guidelines for Designing High-Speed FPGA
Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
ALTLVDS Megafunction User Guide
© December 2009 Altera Corporation
AN 224: High-Speed Board
PCBs.
Software Overview
and the
Related parts for EP3C5E144A7N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![EP3C5](/images/no-image3.png)
Part Number:
Description:
Cyclone III Device Data Sheet
Manufacturer:
ALTERA [Altera Corporation]
Datasheet:
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: