LAN89218AQ SMSC, LAN89218AQ Datasheet - Page 154

• Manufacturer Part Number: LAN89218AQ
• Description: Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
• Manufacturer: SMSC

Specifications of LAN89218AQ

• Ethernet Connection Type: 10BASE-T, 100BASE-TX
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE802.3, IEEE802.3u
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.3 (02-23-10)
REVISION LEVEL
AND DATE
(11-21-08)
(11-21-08)
(06-20-08)
(06-19-08)
(06-13-08)
Rev. 1.2
Rev. 1.2
Rev. 1.0
Rev. 1.0
Rev. 1.0
All
Table 7.8 on page 151
Section 5.3.23, "E2P_CMD –
EEPROM Command Register," on
page 107
Chapter 7, "Operational
Characteristics," on page 145
Table 2.4, “System and Power
Signals,” on page 19
Figure 1.2, "Internal Block Diagram"
Table 2.4, “System and Power
Signals,” on page 19
Section 3.6, "Checksum Offload
Engines (COE)," on page 32
Section , "," on page 126
Section , "," on page 126
Section 5.3.1, "ID_REV—Chip ID
and Revision," on page 85
Section 3.5, "Wake-up Frame
Detection," on page 29
5.4.1, "MAC_CR—MAC Control
Register," on page 111
Section 5.4.12, "WUCSR—Wake-up
Control and Status Register," on
page 121
All
SECTION/FIGURE/ENTRY
Table 9.1 Customer Revision History (continued)
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
and
DATASHEET
Section
154
Fixed various typos
Updated crystal specifications:
Drive Level: 300uW
ESR 50 Ohms
Corrected MAC Address Loaded (bit 8) type from
“RO” to “R/WC”
Added HBM ESD value, thermal specifications,
power numbers.
Fixed note cross-references in the VDD_CORE
and VDD_PLL pin descriptions.
Diagram redone to add PLL regulator block and
add the word “core” to the original regulator block.
Added new note underneath table which is
referenced in the VDD_CORE and VDD_PLL pin
descriptions: “This pin must not be used to supply
power to other external devices.”
Fixed pagination.
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for..” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE support
are advertised, the device will only be configured
to, at most, one of the two settings upon auto-
negotiation completion.”
(Bugzilla Bug 1901)
Removed “0000” from the default value of the Chip
Revision field. This was replaced with a cross-
reference to a new note which states, “Default
value is dependant on device revision.”
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the
up Control and Status
up frame will wake-up the device despite the state
of the Disable Broadcast Frame (BCAST) bit in the
MAC_CR—MAC Control
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
Fixed various typos
CORRECTION
Register, a broadcast wake-
Register.”
WUCSR—Wake-
SMSC LAN89218
Datasheet