DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 129
DS3181
Manufacturer Part Number
DS3181
Description
Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3184DK.pdf
(400 pages)
Specifications of DS3181
Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
280 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TEBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 10-14. DS3 PLCP Frame
10.5.11.2 DS3 M23 (with C-bits used as payload) Direct Mapping
For direct mapping into DS3 M23 (with the C-bits used as payload) frames, ATM cells must be bit aligned, HDLC
packets are always bit aligned. The NAD bit must be set to one in this mode when direct mapping ATM cells into
DS3 M23 (with the C-bits used as payload) frames.
NOTE: PLCP mapping into DS3 M23 (with the C-bits used as payload) frames will not operate correctly.
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A1
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
A2
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P0
M2
M1
G1
C1
Z6
Z5
Z4
Z3
Z2
Z1
F1
B1
Subframe (57 Bytes)
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes
53 Payload Bytes (1 cell)
129
13 or 14
Nibbles
Trailer
Subframes
12
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