DS3181 Maxim Integrated Products, DS3181 Datasheet - Page 236
DS3181
Manufacturer Part Number
DS3181
Description
Network Controller & Processor ICs DS3-E3 ATM-Packet PH Y with Built-in Line
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3184DK.pdf
(400 pages)
Specifications of DS3181
Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
280 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TEBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 11: System Bus Loopback (SLB). This bit enables the system bus loopback mode per port when the bit is set.
ATM cells and/or HDLC packets are looped back from the transmit system bus to the receive system bus through
the FIFOs. See
Bits 10 to 8: Loopback Mode [2:0] (LBM[2:0]). These bits select the loopback modes for analog loopback (ALB),
line loopback (LLB), payload loopback (PLB) and diagnostic loopback (DLB). See
select codes. Default: No Loopback.
Bits 7 to 4: General-Purpose IO B Output Select[3:0] (GPIOB[3:0]) These bits determine which alarm status
signal to output on the GPIO2(port 1), GPIO4(port 2), GPIO6(port 3) or GPIO8(port 4) pins. The GPIO pin must be
enabled by setting the bits in the
signal. See
Bits 3 to 0: General-Purpose IO A Output Select[3:0] (GPIOA[3:0]) These bits determine which alarm status
signal to output on the GPIO1(port 1), GPIO3(port 2), GPIO5(port 3) or GPIO7(port 4) pins. The GPIO pin must be
enabled for output by setting the bits in the
Table 10-16
Table 10-15.
GPIOB3
for the alarm select codes.
15
—
Figure 10-10
0
7
0
See
GPIOB2
14
—
0
6
0
for the block diagram highlighting loopback features.
Table 10-16
PORT.CR4
Port Control Register 4
(0,2,4,6)46h
GL.GIOCR
GPIOB1
13
—
0
5
0
for the alarm select codes.
GL.GIOCR
and either
GPIOB0
12
—
0
0
4
236
GL.CR1
register. See
GPIOA3
or
SLB
11
0
3
0
GL.CR2
Table 10-15
registers to output the selected alarm
GPIOA2
LBM2
10
0
2
0
for configuration settings. See
Table 10-17
GPIOA1
LBM1
9
0
1
0
for the loopback
GPIOA0
LBM0
8
0
0
0
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