COM20022I3V-HD SMSC, COM20022I3V-HD Datasheet - Page 45
COM20022I3V-HD
Manufacturer Part Number
COM20022I3V-HD
Description
Network Controller & Processor ICs ARCNET Contrllr
Manufacturer
SMSC
Datasheet
1.COM20022I3V-HD.pdf
(83 pages)
Specifications of COM20022I3V-HD
Data Rate
10 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM
Datasheet
SMSC COM20022I 3V
BIT
3,2
BIT
7-0
1
0
DMA Transfer
Mode
TC Polarity
DREQ Polarity
Terminal Count
Timer Mode
Cycle Mode
BIT NAME
BIT NAME
TC7-TC0
TIM7-TIM0
CYC7-
CYC0
SYMBOL
DMAMD1,
DMAMD0
TCPOL
DRQPOL
SYMBOL
Table 6.15 - DMA Count Register
DATASHEET
TC7-TC0: Used for non-burst or burst mode. These are the
lower 8 bits of the Terminal Count setting register. The MSB
(TC8) is in the Bus Control Register. The Terminal Count
setting range is from 1 to 512 counts (TC8 - TC0 all zeroes
means 512 counts).
TIM7-TIM0: Used for Programmable-Burst by Timer mode.
These bits are for setting the term of the continuous DMA
transfer. The time range is from 100nS to 25.6μS. The step is
100nS (TIM7-TIM0 all zeroes means 25.6μs).
CYC7-CYC0: Used for Programmable-Burst by Cycle mode.
These bits are for setting the term of the continuous DMA
transfer. The cycle range is from 2 to 256 cycles. CYC7-
CYC0 all zeroes means 256 cycles. (1 is illegal)
These bits select the data transfer mode of the DMA. These
transfer modes influence the timing of asserting/negating the
DREQ pin.
This bit sets the Active polarity of TC pin.
TCPOL = 0: Active High (Default), TCPOL = 1 Active Low
This bit sets the Active polarity of DREQ pin.
DRQPOL = 0: Active High (Default), DRQPOL = 1 Active
Low
DMAMD1
0
0
1
1
Page 45
DMAMD0
0
1
0
1
DESCRIPTION
DESCRIPTION
Non-Burst (Default)
Burst
Programmable-Burst by Timer
Programmable-Burst by Cycle
Counter
Transfer Mode
Revision 02-27-06
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