FQU3P20TU Fairchild Semiconductor, FQU3P20TU Datasheet
FQU3P20TU
Specifications of FQU3P20TU
Related parts for FQU3P20TU
FQU3P20TU Summary of contents
Page 1
... Thermal Resistance, Junction-to-Ambient * JA R Thermal Resistance, Junction-to-Ambient JA * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor International Features • -2.4A, -200V, R • Low gate charge ( typical 6.0 nC) • Low Crss ( typical 7.5 pF) • Fast switching • 100% avalanche tested • ...
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... Repetitive Rating : Pulse width limited by maximum junction temperature 39mH -2.4A -50V -2.8A, di/dt 300A DSS, 4. Pulse Test : Pulse width 300 s, Duty cycle 2% 5. Essentially independent of operating temperature ©2000 Fairchild Semiconductor International T = 25°C unless otherwise noted C Test Conditions -250 -250 A, Referenced to 25° -200 ...
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... Drain Current [A] D Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 400 300 C iss C oss 200 C rss 100 Drain-Source Voltage [V] DS Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International Notes : 1. 250 s Pulse Test = 10V Note : 0.4 Figure 4. Body Diode Forward Voltage ...
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... Temperature Operation in This Area is Limited by R DS(on Notes : 150 Single Pulse - Drain-Source Voltage [V] DS Figure 9. Maximum Safe Operating Area ©2000 Fairchild Semiconductor International (Continued) 2.5 2.0 1.5 1.0 Notes : 0 -250 0.0 100 150 200 -100 o C] 2.5 2.0 100 1 1.0 0.5 0 Figure 11 ...
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... Resistive Switching Test Circuit & Waveforms -10V -10V Unclamped Inductive Switching Test Circuit & Waveforms -10V -10V ©2000 Fairchild Semiconductor International Gate Charge Test Circuit & Waveform Same Type Same Type as DUT as DUT -10V -10V DUT DUT DUT DUT ...
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... Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver ) ( Driver ) DUT ) ( DUT ) DUT ) ( DUT ) ©2000 Fairchild Semiconductor International + + DUT DUT Driver Driver Compliment of DUT Compliment of DUT (N-Channel) (N-Channel) • dv/dt controlled by R • dv/dt controlled by R • I • I controlled by pulse period ...
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... Package Dimensions 6.60 5.34 (0.50) (4.34) MAX0.96 2.30TYP [2.30 0.20] ©2000 Fairchild Semiconductor International DPAK 0.20 0.30 (0.50) 0.76 0.10 2.30TYP [2.30 0.20] 2.30 0.10 0.50 0.10 0.50 0.10 1.02 0.20 2.30 0.20 6.60 0.20 (5.34) (5.04) (1.50) (2XR0.25) 0.76 0.10 ...
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... Package Dimensions (Continued) 6.60 5.34 (0.50) (4.34) MAX0.96 0.76 0.10 2.30TYP [2.30 0.20] ©2000 Fairchild Semiconductor International IPAK 0.20 0.20 (0.50) 2.30TYP [2.30 0.20] 2.30 0.20 0.50 0.10 0.50 0.10 Rev. A, April 2000 ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ CMOS™ FACT™ FACT Quiet Series™ ® FAST FASTr™ ...