HUF75652G3 Fairchild Semiconductor, HUF75652G3 Datasheet - Page 2

MOSFET N-CH 100V 75A TO-247

HUF75652G3

Manufacturer Part Number
HUF75652G3
Description
MOSFET N-CH 100V 75A TO-247
Manufacturer
Fairchild Semiconductor
Series
UltraFET™r
Type
Power MOSFETr
Datasheet

Specifications of HUF75652G3

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
8 mOhm @ 75A, 10V
Drain To Source Voltage (vdss)
100V
Current - Continuous Drain (id) @ 25° C
75A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
475nC @ 20V
Input Capacitance (ciss) @ Vds
7585pF @ 25V
Power - Max
515W
Mounting Type
Through Hole
Package / Case
TO-247-3
Number Of Elements
1
Polarity
N
Channel Mode
Enhancement
Drain-source On-res
0.008Ohm
Drain-source On-volt
100V
Gate-source Voltage (max)
±20V
Drain Current (max)
75A
Power Dissipation
515W
Output Power (max)
Not RequiredW
Frequency (max)
Not RequiredMHz
Noise Figure
Not RequireddB
Power Gain
Not RequireddB
Drain Efficiency
Not Required%
Operating Temp Range
-55C to 175C
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
3 +Tab
Package Type
TO-247
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.008 Ohms
Drain-source Breakdown Voltage
100 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
75 A
Maximum Operating Temperature
+ 175 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Electrical Specifications
Source to Drain Diode Specifications
©2001 Fairchild Semiconductor Corporation
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to
Ambient
SWITCHING SPECIFICATIONS (V
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
PARAMETER
PARAMETER
T
GS
C
= 25
= 10V)
SYMBOL
SYMBOL
o
V
r
Q
BV
t
Q
DS(ON)
Q
C, Unless Otherwise Specified
t
d(OFF)
C
C
GS(TH)
R
R
I
I
d(ON)
t
g(TOT)
C
Q
Q
GSS
t
Q
V
DSS
OFF
g(TH)
g(10)
OSS
ON
RSS
ISS
t
DSS
t
t
SD
RR
gs
gd
r
rr
JC
f
JA
I
V
V
V
V
I
TO-247
V
V
V
V
V
f = 1MHz
(Figure 12)
I
I
I
I
D
D
SD
SD
SD
SD
DS
DS
GS
GS
DD
GS
GS
GS
DS
= 250 A, V
= 75A, V
= 75A
= 35A
= 75A, dI
= 75A, dI
= 95V, V
= 90V, V
= 25V, V
= 20V
= V
= 50V, I
= 0V to 20V
= 0V to 10V
= 0V to 2V
DS
, I
GS
D
D
SD
SD
GS
GS
GS
GS
= 10V (Figures 9)
= 75A, V
TEST CONDITIONS
= 250 A (Figure 10)
TEST CONDITIONS
/dt = 100A/ s
/dt = 100A/ s
= 0V
= 0V, T
= 0V,
= 0V (Figure 11)
V
I
I
(Figure 13)
GS
D
g(REF)
C
DD
= 75A,
= 150
= 50V,
10V, R
= 1.0mA
o
C
GS
= 2.0
MIN
100
MIN
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.0067
7585
2345
TYP
18.5
195
190
393
211
630
TYP
80
14
26
74
-
-
-
-
-
-
-
-
-
-
-
-
-
0.008
MAX
MAX
0.29
16.5
1.25
1.00
250
320
410
475
255
HUF75652G3 Rev. B
150
490
100
30
1
4
-
-
-
-
-
-
-
-
-
-
UNITS
UNITS
o
o
C/W
C/W
nA
nC
nC
nC
nC
nC
pF
pF
pF
nC
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
A
A

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