This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor‘s advanced Power Trench® process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance
This N-Channel logic Level MOSFETs are produced using Fairchild Semiconductor‘s advanced Power Trench® process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance
This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench® process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance
... Symbol Characteristic R Junction-to-Case JC R Case-to-Sink CS R Junction-to-Ambient DS(on TO-3P = -150V 1.Gate 2. Drain 3. Source Value -150 o = =100 C) -11.5 C ① -72 ±30 ② 1215 ① -18 ① 20.4 ③ -5.0 o =25 C) 204 C 1. +150 300 Typ. -- 0.24 -- SFH9154 = -150 V DSS = 0 Units V/ Max. Units 0. C ...
... SFH9154 Electrical Characteristics Symbol Characteristic BV Drain-Source Breakdown Voltage DSS ΔBV/ΔT Breakdown Voltage Temp. Coeff Gate Threshold Voltage GS(th) Gate-Source Leakage , Forward I GSS Gate-Source Leakage , Reverse I Drain-to-Source Leakage Current DSS Static Drain-Source R DS(on) On-State Resistance g Forward Transconductance fs C Input Capacitance iss ...
... Fig 3. On-Resistance vs. Drain Current Drain Current [A] D Fig 5. Capacitance vs. Drain-Source Voltage iss oss rss gd C iss oss rss Drain-Source Voltage [ Fig 2. Transfer Characteristics Fig 4. Source-Drain Diode Forward Voltage Fig 6. Gate Charge vs. Gate-Source Voltage SFH9154 Gate-Source Voltage [ Source-Drain Voltage [ Total Gate Charge [nC ...
... SFH9154 Fig 7. Breakdown Voltage vs. Temperature Junction Temperature [ J Fig 9. Max. Safe Operating Area DS(on Drain-Source Voltage [ D=0.5 0 0.1 0.05 0.02 0.01 single pulse - Square Wave Pulse Duration 1 Fig 8. On-Resistance vs. Temperature Fig 10. Max. Drain Current vs. Case Temperature Fig 11. Thermal Response @ Notes : (t) = 0.61 C/W Max. ...
... DUT -10V Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms Vary t to obtain required peak DUT -10V Same Type as DUT -10V DUT R 2 Current Sampling ( Resistor d(on 0.5 rated 10% 90% V out DSS SFH9154 Charge off d(off) BV DSS 1 ---- 2 -------------------- = DSS DD Time (t) D (t) 5 ...
... SFH9154 Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT Driver Driver ) DUT ) DUT ) + Compliment of DUT (N-Channel) • dv/dt controlled by 밨 G • I controlled by Duty Factor “D” S Gate Pulse Width -------------------------- D = Gate Pulse Period Body Diode Reverse Current Body Diode Forward Current ...