MT46V64M8P-5B:F Micron Technology Inc, MT46V64M8P-5B:F Datasheet - Page 21

• Manufacturer Part Number: MT46V64M8P-5B:F
• Description: DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.6V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V64M8P-5B:F

• Density: 512 Mb
• Maximum Clock Rate: 400 MHz
• Package: 66TSOP
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 2.6 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Package / Case: 66-TSOP
• Organization: 64Mx8
• Address Bus: 15b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.6V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 195mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 13:
Figure 11:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Parameter/Condition
Clock input mid-point voltage: CK and CK#
Clock input voltage level: CK and CK#
Clock input differential voltage: CK and CK#
Clock input differential voltage: CK and CK#
Clock input crossing point voltage: CK and CK#
–0.30V
2.80V
1.45V
1.25V
1.05V
CK#
CK
Clock Input Operating Conditions
Notes: 1–5, 16, 17, 31 apply to the entire table; Notes appear on page 35;
0°C ≤ T
SSTL_2 Clock Input
X X
Notes:
A
≤ +70°C; V
1.
2.
3. CK and CK# must cross in this region.
4.
5. CK and CK# must have a minimum 700mV peak-to-peak swing.
6. For AC operation, all DC clock requirements must also be satisfied.
7. Numbers in diagram reflect nominal values for all devices other than -5B.
CK or CK# may not be more positive than V
This provides a minimum of 1.15V to a maximum of 1.35V and is always half of V
CK and CK# must meet at least V
DD
Q = +2.5V ±0.2V, V
Symbol
V
DD
V
V
V
V
MP
IN
ID
ID
IX
= +2.5V ±0.2V (V
(
(
(
(
(
AC
DC
DC
AC
DC
)
)
)
)
21
)
X X
ID
(
DC
0.5 × V
)
MIN when static and is centered around V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
1.15
0.36
–0.3
Electrical Specifications – DC and AC
0.7
DD
DD
DD
Q - 0.2
Q + 0.3V or more negative than V
Q = +2.6V ±0.1V, V
512Mb: x4, x8, x16 DDR SDRAM
0.5 × V
V
V
V
DD
DD
DD
Max
1.35
V
Q + 0.3
Q + 0.6
Q + 0.6
DD
Maximum clock level
MP
Minimum clock level 1
Q + 0.2
(
DC
DD
©2000 Micron Technology, Inc. All rights reserved.
)
2 V
= +2.6V ±0.1V for -5B)
IX
(
AC
Units
)
3
V
V
V
V
V
SS
DD
MP
V
- 0.3V.
1
ID
Q.
(
(
DC
DC
)
)
Notes
V
.
4
7, 10
ID
7, 9
10
7
9
(
AC
) 5