MT46V64M8P-5B:F Micron Technology Inc, MT46V64M8P-5B:F Datasheet - Page 67

• Manufacturer Part Number: MT46V64M8P-5B:F
• Description: DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.6V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V64M8P-5B:F

• Density: 512 Mb
• Maximum Clock Rate: 400 MHz
• Package: 66TSOP
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 2.6 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Package / Case: 66-TSOP
• Organization: 64Mx8
• Address Bus: 15b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.6V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 195mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 32:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Command
Command
Address
Address
Address
READ-to-WRITE
DQS
DQS
DQS
CK#
CK#
CK#
DM
DM
DM
DQ
DQ
DQ
CK
CK
CK
Notes:
Bank a,
READ
Bank,
READ
Bank,
READ
Col n
Col n
Col n
T0
T0
T0
1. Page remains open.
2. DO n = data-out from column n; DI b = data-in from column b.
3. BL = 4 (applies for bursts of 8 as well; if BL = 2, the BURST command shown can be NOP).
4. One subsequent element of data-out appears in the programmed order following DO n.
5. Data-in elements are applied following DI b in the programmed order.
6. Shown with nominal
CL = 2
BST
BST
BST
T1
T1
T1
CL = 2.5
1
1
1
CL = 3
t
AC,
NOP
NOP
NOP
T2
T2
T2
t
DQSCK, and
DO
n
67
T2n
T2n
DO
n
WRITE
NOP
Bank,
Col b
T3
T3
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
(NOM)
t
DQSS
DQSQ.
DO
n
T3n
T3n
512Mb: x4, x8, x16 DDR SDRAM
Transitioning Data
WRITE
Bank,
WRITE
Col b
T4
T4
T4
NOP
DI
b
t
(NOM)
DQSS
t
(NOM)
DQSS
T4n
©2000 Micron Technology, Inc. All rights reserved.
T5
T5
T5
DI
NOP
NOP
DI
NOP
b
b
Don’t Care
T5n
T5n
T5n
Operations