MT46V64M8P-5B:F Micron Technology Inc, MT46V64M8P-5B:F Datasheet - Page 49

DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.6V 66-Pin TSOP Tray

MT46V64M8P-5B:F

Manufacturer Part Number
MT46V64M8P-5B:F
Description
DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.6V 66-Pin TSOP Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V64M8P-5B:F

Density
512 Mb
Maximum Clock Rate
400 MHz
Package
66TSOP
Address Bus Width
15 Bit
Operating Supply Voltage
2.6 V
Maximum Random Access Time
0.7 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
512M (64M x 8)
Speed
5ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 2.7 V
Package / Case
66-TSOP
Organization
64Mx8
Address Bus
15b
Access Time (max)
700ps
Operating Supply Voltage (typ)
2.6V
Package Type
TSOP
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.5V
Supply Current
195mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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READ
Figure 18:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
READ Command
Note:
The READ command is used to initiate a burst read access to an active row, as shown in
Figure 18 on page 49. The value on the BA0, BA1 inputs selects the bank, and the address
provided on inputs A0–Ai (where Ai is the most significant column address bit for a given
density and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
CS#
A10
EN AP = enable auto precharge; DIS AP = disable auto precharge.
CK
HIGH
DIS AP
EN AP
Bank
Col
Don’t Care
49
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Commands

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