FLLXT971ABC.A4 Intel, FLLXT971ABC.A4 Datasheet - Page 104

• Manufacturer Part Number: FLLXT971ABC.A4
• Manufacturer: Intel

Specifications of FLLXT971ABC.A4

• Lead Free Status / RoHS Status: Not Compliant

Intel
104
Table 62. Transmit Control Register - Address 30, Hex 1E
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Table 62
30.15:13
30.12
30.11:10
30.9:0
1. Values are approximations and may vary outside indicated values based upon implementation loading
2. R/W = Read/Write
3. Latch State during Reset is based on the state of hardware configuration pins at RESET_L.
Bit
conditions. Not guaranteed.
lists transmit control bits.
Reserved
Transmit Low Power
Port Rise Time Control
Reserved
Name
1
Write as ‘0’. Ignore on Read.
Transmit Low Power
0 = Normal transmission.
1 = Forces the transmitter into low power mode.
Port Rise Time Control
00 = 3.0 ns (Default = Setting on TXSLEW[1:0]
pins)
01 = 3.4 ns
10 = 3.9 ns
11 = 4.4 ns
Ignore on Read.
Also forces a zero-differential transmission.
Description
Document Number: 249414-003
Revision Date: June 18, 2004
Type
R/W
R/W
R/W
R/W
Datasheet
2
0000000
Default
Note 3
000
000
0