FLLXT971ABC.A4 Intel, FLLXT971ABC.A4 Datasheet - Page 77
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FLLXT971ABC.A4
Manufacturer Part Number
FLLXT971ABC.A4
Description
Manufacturer
Intel
Datasheet
1.FLLXT971ABC.A4.pdf
(110 pages)
Specifications of FLLXT971ABC.A4
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Datasheet
Document Number: 249414-003
Revision Date: June 18, 2004
Figure 29. Intel
Table 33. Intel
TXD[3:0], TX_EN, TX_ER
TX_CLK High
TXD[3:0], TX_EN, TX_ER hold from
TX_CLK High
TX_EN sampled to CRS asserted
TX_EN sampled to CRS de-asserted
TX_EN sampled to TPFO out (Tx
latency)
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
3. TX_ER is not shown in the figure.
testing.
rate. 100BASE-T bit time = 10
®
®
LXT971A Transceiver 100BASE-TX Transmit Timing Parameters
LXT971A Transceiver 100BASE-TX Transmit Timing - 4B Mode
Parameter
TXD[3:0]
TXCLK
TX_EN
TPFO
CRS
0ns
3
setup to
-8
Intel
s or 10 ns.
t3
t5
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Symbol
t2
t1
t1
t2
t3
t4
t5
Min
5.3
12
20
24
0
Typ
–
–
–
–
–
1
250ns
t4
Max
5.7
24
28
–
–
Units
BT
BT
BT
ns
ns
B3453-02
2
Test Conditions
-
4B Mode
–
–
–
–
–
77
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