FLLXT971ABC.A4 Intel, FLLXT971ABC.A4 Datasheet - Page 78

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FLLXT971ABC.A4

Manufacturer Part Number
FLLXT971ABC.A4
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT971ABC.A4

Lead Free Status / RoHS Status
Not Compliant

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Intel
78
Figure 30. Intel
Table 34. Intel
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
RXD[3:0], RX_DV, set up
to RX_CLK High
RXD[3:0], RX_DV, RX_ER
from RX_CLK High
CRS asserted to RXD[3:0], RX_DV
Receive start of “J” to CRS asserted
Receive start of “T” to CRS de-asserted
Receive start of “J” to COL asserted
Receive start of “T” to COL de-asserted
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
3. The RX_ER signal is not shown in the figure.
testing.
rate. 100BASE-T bit time = 10
®
®
LXT971A Transceiver 100BASE-FX Receive Timing Parameters
LXT971A Transceiver 100BASE-FX Receive Timing
RXD[3:0]
RX_CLK
Parameter
RX_DV
TPFI
CRS
COL
0ns
3
hold
-8
s or 10 ns.
t4
t6
Sym
t1
t2
t3
t4
t5
t6
t7
Min
10
10
12
16
10
14
3
t3
Typ
250ns
1
Max
16
22
15
18
5
t5
t7
t1
t2
Units
Document Number: 249414-003
BT
BT
BT
BT
BT
ns
ns
Revision Date: June 18, 2004
B3452-02
2
Test Conditions
Datasheet

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