FLLXT971ABC.A4 Intel, FLLXT971ABC.A4 Datasheet - Page 26

• Manufacturer Part Number: FLLXT971ABC.A4
• Manufacturer: Intel

Specifications of FLLXT971ABC.A4

• Lead Free Status / RoHS Status: Not Compliant

Intel
5.2
5.2.1
26
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Network Media / Protocol Support
This section includes the following:
The LXT971A Transceiver supports both 10BASE-T and 100BASE-TX Ethernet over twisted-pair
or 100 Mbps Ethernet over fiber media (100BASE-FX).
10/100 Network Interface
The network interface port consists of five external pins (two differential signal pairs and a signal
detect pin). The I/O pins are shared between twisted-pair (TP) and fiber. For specific pin
assignments, see
The LXT971A Transceiver output drivers can generate one of the following outputs:
When not transmitting data, the LXT971A Transceiver generates IEEE 802.3-compliant link
pulses or idle code. Depending on the mode selected, input signals are decoded as one of the
following:
Auto-negotiation/parallel detection or manual control is used to determine the speed of this
interface.
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Section 5.2.1, “10/100 Network Interface”
Section 5.2.2, “MII Data Interface”
Section 5.2.3, “Configuration Management Interface”
100BASE-TX
10BASE-T
100BASE-FX
100BASE-TX
10BASE-T
100BASE-FX
Chapter 4.0, “Signal Descriptions for Intel® LXT971A
Document Number: 249414-003
Transceiver”.
Revision Date: June 18, 2004
Datasheet