FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 15

• Manufacturer Part Number: FLLXT1000BA.C4QE000
• Manufacturer: Intel

Specifications of FLLXT1000BA.C4QE000

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
Document #: 249276
Revision #: 002
Rev. Date: 07/20/01
G2
J5
AF5, AF6,
AF10,AF9
AF16,AF17,
AF21, AF20
H3
H5
G4
K5
1. I/O Column Coding: I = Input, O = Output
2. Complies with IEEE 802.3, Clauses 35.(GMII) and 22 (MII); Modes 1000 (GMII), 100 (MII), 10 (MII or Serial), Auto-
3. Complies with IEEE 802.3, Clause 36. NOTE: This section is an alternate listing of previously described pins.
1. I/O Column Coding: I = Input, O = Output
1. I/O Column Coding: LHR = Input, Latched on Low-to-High edge of RESET (ignored thereafter); I, MD = Input, Latched on
2. MAC Interface Operating modes: GMII (1000 Mbps), MII (10 or 100 Mbps), Serial (10 Mbps).
Ball #
negotiation.
Low-to-High edge of RESET, used thereafter only if Manual Control mode (MDDIS = 1).
Table 2. LXT1000 GMII Signal Descriptions (Continued)
Table 3. LXT1000 Twisted-Pair Interface Signal Descriptions
Table 4. LXT1000 Configuration Signal Descriptions
Ball #
Ball #
MDC
MDIO
SPEED2
SPEED1
SPEED0
AN_EN
TPAP, TPAN
TPBP, TPBN
TPCP, TPCN
TPDP, TPDN
Symbol
Symbol
Symbol
I
I/O
Type
I/O
I/O
I/O
I/O
I, MD
LHR
Type
Type
1
1
1
Management Data Clock. Clock for the MDIO serial data channel. Maximum
frequency is 2.5 MHz.
Management Data Input/Output. Bidirectional serial data channel for communication
between the PHY and the management function.
Twisted-Pair A - D, Positive and Negative. For 1000BASE-T operation, all four
pair are both input and output at the same time. For 100BASE-TX and 10BASE-T
operation, only TPAP/TPAN and TPBP/TPBN are used. The device automatically
configures input and output pairs.
Speed Select. These inputs determine the LXT1000’s operating speed. When
the MAC Interface is used in a TBI configuration, they must be set as follows:
High, Low, Low (advertise 1000BASE-T only).
When the MAC Interface is used in a GMII configuration, their function varies
depending on whether auto-negotiation is enabled. When auto-negotiation is
enabled, each signal, when High, enables advertising of a specific speed via the
corresponding bits in the MII Registers:
SPEED<2> = 1000 (9.9, 9.8)
SPEED<1> = 100 (4.7, 4.8)
SPEED<0> = 10 (4.5, 4.6)
When auto-negotiation is disabled by tying AN_EN Low, SPEED<0> forces the
speed via MII Bit 0.13 to either 10 (= 0) or 100 (=1). SPEED<2:1> should be tied
Low.
Auto Negotiation Enable. This input sets the power-on state of MII Register Bit
0.12, which controls Auto-Negotiation. Normally, this input should be tied High.
When High, auto-negotiation is enabled.
When Low, auto-negotiation is disabled.
GMII Control Interface
Gigabit Ethernet Transceiver — LXT1000
Description
Description
Description
2
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