FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 21

• Manufacturer Part Number: FLLXT1000BA.C4QE000
• Manufacturer: Intel

Specifications of FLLXT1000BA.C4QE000

• Lead Free Status / RoHS Status: Not Compliant

2.1.4
2.1.5
2.1.6
2.1.7
2.1.8
2.2
Datasheet
Document #: 249276
Revision #: 002
Rev. Date: 07/20/01
Hardware Control Interface
The LXT1000 is configurable at power up or hardware reset. Configuration options and
operational settings of the device include such variables as link establishment, MAC interface
operation and control, and physical address of the device. See
page
JTAG Boundary Scan Interface
The LXT1000 includes an IEEE JTAG1149.1 boundary scan test port for board level testing.
Initialization
Re-initialization and re-configuration functions are identical for power-up and hardware reset. (An
external hardware reset circuit is not required.)
Link
The LXT1000 continuously monitors link state, and indicates to upper management the state (up or
down), speed (1000, 100, 10), and duplex state (full, half) of the link.
Auto Negotiation
The LXT1000 provides full IEEE 802.3ab-compliant auto-negotiation, with automatic next-page
generation. It also provides an option for manual next-page generation.
LXT1000 Applications
The LXT1000 supports NIC and switch applications. It provides half- and full-duplex operation at
1000 Mbps, 100 Mbps and 10 Mbps. Refer to
shows the LXT1000 Block Diagram.
33.
Figure 3
Gigabit Ethernet Transceiver — LXT1000
for typical applications and
“Hardware Control Interface” on
Figure
4, which
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