FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 33
FLLXT1000BA.C4QE000
Manufacturer Part Number
FLLXT1000BA.C4QE000
Description
Manufacturer
Intel
Datasheet
1.FLLXT1000BA.C4QE000.pdf
(106 pages)
Specifications of FLLXT1000BA.C4QE000
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2.3.7
Datasheet
Document #: 249276
Revision #: 002
Rev. Date: 07/20/01
Figure 13. Interrupt Handling
Hardware Control Interface
Configuration options and operational settings of the device include such variables as link
establishment, MAC interface operation and control, and physical address of the device. Individual
chip addressing allows multiple LXT1000 devices to share the GMII in either mode.
all hardware selectable configurations. Some configuration bits are read only at hardware reset.
For hardware-only applications, the Hardware Control Interface provides continuous control of the
LXT1000. This mode is selected by driving the MDDIS input High.
In this setting, read and write operations on the MDIO interface are disabled; use is solely
monitoring applications.
For software or MAC-managed applications, the Hardware Control Interface provides initial
settings of the MII Register bits. This mode is selected by driving MDDIS Low.
Force Interrupt
Interrupt Status Reg
Interrupt Enable Reg
. .
AND
Event Status Reg is cleared on read.
Interrupt Enable
OR
Gigabit Ethernet Transceiver — LXT1000
AND
Interrupt Pin
Table 15
lists
33
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