FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 63

• Manufacturer Part Number: FLLXT1000BA.C4QE000
• Manufacturer: Intel

Specifications of FLLXT1000BA.C4QE000

• Lead Free Status / RoHS Status: Not Compliant

2.7.1
2.7.2
2.7.3
2.7.4
2.7.5
Datasheet
Document #: 249276
Revision #: 002
Rev. Date: 07/20/01
Transmitting/Receiving
In 10 Mbps mode, when the receiver detects preamble, it always asserts CRS immediately. Its next
action depends on the state of bit 16.5. If 16.5 = 1, the LXT1000 strips the entire 10 Mbps
preamble, asserting RX_DV starting with the start-of-frame marker “5D”. The first data driven on
the RXD lines is the Ethernet Destination Address of the packet. If 16.5 = 0, the LXT1000 asserts
RX_DV at the same time as CRS, and drives preamble on the lines.
Because 10 Mbps Ethernet uses a non-continuous carrier, the first preamble octets may be lost
while the LXT1000 is synchronizing its receiver to the incoming packet. In addition, the LXT1000
may have to insert an additional octet of preamble when the SFD occurs in order to byte-
synchronize the incoming data packet. For both these reasons, there exact number of
preamble+SFD octets (8) may not be duplicated at the MAC Interface.
In either case, the LXT1000 continues asserting RX_DV and CRS and driving data onto the RXD
balls until it detects an end-of-frame marker. At this point, it de-asserts RX_DV and CRS and the
RXD signals.
The LXT1000 RX_CLK switches phase before a 10BASE-T packet is received. While the line is
idle, the internal PLL that generates RX_CLK idles at the last known phase of the previous packet.
When carrier is detected, the phase is adjusted in a glitch-free manner to match the incoming
signal.
Polarity Correction
The LXT1000 automatically detects and corrects for the condition where the receive signal is
inverted. Reversed polarity is detected if 8 inverted link pulses, or 4 inverted end-of-frame
markers, are received consecutively. If link pulses or data are not received for 96-128 ms, the
polarity state is reset to a non-inverted state.
Link Test
In 10 Mbps mode, the LXT1000 always transmit link pulses. If the link test function is enabled, it
monitors the connection for link pulses. Once link pulses are detected, data transmission will be
enabled and will remain enabled as long as either the link pulses or data transmission continue. If
the link pulses stop, the data transmission will be disabled.
If auto-negotiation is disabled, the link will re-establish after a packet or four link pulses are
received. If auto-negotiation is enabled, re-negotiation occurs.
Link Failure
Link failure occurs if Link Test is enabled and link pulses or packets stop being received. If this
condition occurs, the LXT1000 returns to the auto-negotiation phase if auto-negotiation is enabled.
SQE (Heartbeat)
By default, the SQE (heartbeat) function is disabled on the LXT1000. To enable this function, set
bit 16.9 = 1. When this function is enabled, the LXT1000 will assert its COL output for 5-15 Bit
Times (BT) after each packet.
Gigabit Ethernet Transceiver — LXT1000
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