FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 28

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FLLXT1000BA.C4QE000

Manufacturer Part Number
FLLXT1000BA.C4QE000
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT1000BA.C4QE000

Lead Free Status / RoHS Status
Not Compliant
LXT1000 — Gigabit Ethernet Transceiver
2.3.2.5
2.3.3
28
Figure 7. Serial Interface
Figure 8. Relationship between 10 Mbps Serial Interface and 10 Mbps MII Interface
Table 14. Test Loopback Operation
The relationship between 10 Mbps Serial Interface and the 10 Mbps MII Interface is shown in
Figure
Test Loopback
During test loopback the twisted-pair interface is disabled, and data transmitted by the MAC is
internally looped back by the LXT1000 and returned to the MAC. Test loopback is available for 10
Mbps, 100 Mbps, and 1000 Mbps modes of operation. The desired mode of operation for test
loopback is enabled by setting the following register address bits as shown in
mode.
TBI Configuration (1000BASE-T Only)
The LXT1000 provides a Ten-Bit Interface (TBI) for applications where a 1000BASE-T copper
interface needs to be integrated with a MAC originally designed for Gigabit-Ethernet over fiber
applications (1000BASE-LX/SX). In this mode, the LXT1000 drives the following:
1000 Mbps
Operation
100 Mbps
Mode of
10 Mbps
10-bit-wide data bus
COMDET signal
8.
RXD<3> RXD<2> RXD<1> RXD<0>
LXT1000
TXD<3> TXD<2> TXD<1> TXD<0>
D3
MAC’s Serial Bit Stream
16.14
RX_CLK
TX_CLK
0
0
1
RXD0
TXD0
D2
COL
CRS
0.14
1
1
1
D1
0.13
Transmit Clock
0
1
0
Receive Clock
Carrier Sense
Bit
Collision
Transmit
D0
Receive
0.12
0
0
0
0.8
1
1
1
RXD
FIRSTBIT
TXD
0.6
0
0
1
MAC
MAC
Table 14
Document #: 249276
Rev. Date: 07/20/01
Revision #: 002
Datasheet
for each

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