PRLXT9785BC.D0 S L7WP Intel, PRLXT9785BC.D0 S L7WP Datasheet - Page 157

• Manufacturer Part Number: PRLXT9785BC.D0 S L7WP
• Manufacturer: Intel

Specifications of PRLXT9785BC.D0 S L7WP

• Lead Free Status / RoHS Status: Compliant

4.12.3
Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Figure 31. LED Pulse Stretching
Figure 32. RMII Programmable Out-of-Band Signaling
Note: The BGA15 package does not support Out-of-Band Signaling nor the RMII interface.
When a long event (such as duplex status) occurs, it is edge detected and starts the stretch timer.
When the stretch timer expires, the edge detector is reset so that a long event causes another pulse
to be generated from the edge detector. The edge detector resets the stretch timer, causing the LED
driver to remain asserted.
Out-of-Band Signaling
The LXT9785/LXT9785E provides an out-of-band signaling option to transfer status information
across the RMII receive interface. This feature is enabled when Register bit 25.0 = 1 and uses the
RxData(1:0) data bus during the Inter-Packet Gap (IPG) time as shown in
signaling is disabled when Isolate mode is enabled by setting Register 0.10.
The two status bits transferred across the RxData bus are software selectable via Register 25 (see
Table 98, “RMII Out-of-Band Signaling Register (Address 25, Hex 19)” on page
In normal operation, the LXT9785/LXT9785E stuffs the RxData bus with zeros during the IPG. A
software-selectable bit enables the RMII out-of-band signaling feature. Once this bit is set, the
LXT9785/LXT9785E replaces the zeros with selected status bits during the IPG.
RE FCLK
1. When network activity is detected, the LXT9785/LXT9785E asserts CRS_DV asynchronously with respect
2. After CRS_DV is asserted, the LXT9785/LXT9785E zero-stuffs the RxData bits until the received data has
3. When network activity ceases, the LXT9785/LXT9785E de-asserts CRS_DV synchronously with respect
CRS_DV
RXD(1)
RXD(0)
to REFCLK.
been processed through the FIFO.
to REFCLK. CRS_DV toggles until all data in the FIFO has been processed through the RMII. Once the
FIFO is empty, LXT9785/LXT9785E drives the status bits selected by the Out-of-Band Signaling Register
(refer to
Event
LED
Note: The direct drive LED outputs in this diagram are shown as active L ow.
sta tus 1
sta tus 0
Table 98, “RMII Out-of-Band Signaling Register (Address 25, Hex 19)” on page
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
stretch
status 1
status 0
Figure 31 on page 157
0s
0s
data
data
stretch
data
data
data
data
shows how the stretch operation functions.
data
data
status 1
status 0
stretch
status 1
status 0
Figure
status 1
status 0
32. Out-of-Band
215).
215) on the
status 1
status 0
status 1
status 0
157