HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 46
HBLXT9763HC.C4
Manufacturer Part Number
HBLXT9763HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9763HC.C4.pdf
(74 pages)
Specifications of HBLXT9763HC.C4
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LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
46
Peak differential output voltage
(single ended)
Signal rise/fall time
Jitter (measured differentially)
Peak differential input voltage
Common mode input range
Peak differential output voltage
Link transmit period
Transmit timing jitter added by the
MAU and PLS sections
Link min receive timer
Link max receive timer
Time link loss receive
Differential squelch threshold
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
2. Measured at the line side of the transformer, line replaced by 100 (+/-1%) resistor.
3. Parameter is guaranteed by design; not subject to production testing.
4. IEEE 802.3 specifies maximum jitter addition at 1.5 ns for the AUI cable, 0.5 ns from the encoder, and 3.5 ns from the MAU.
5. After line model specified by IEEE 802.3 for 10BASE-T MAU.
Table 20. 100BASE-FX Transceiver Characteristics
Table 21. 10BASE-T Transceiver Characteristics
Parameter
Parameter
3, 4
TLRmax
TLRmin
V
Sym
V
Sym
T
V
CMIR
V
TLL
V
OP
RF
–
–
–
IP
OP
DS
0.55
Min
0.6
Min
–
–
–
2.2
50
50
8
0
2
–
Transmitter
Transmitter
Receiver
Receiver
Typ
Typ
–
–
–
–
–
64
64
–
–
–
4
–
1
1
Max
V
150
150
2.8
24
11
CC
7
–
Max
1.5
1.9
1.4
1.5
- 0.7
mV Peak
Units
ms
ms
ms
ms
ns
V
Units
ns
ns
V
V
V
5 MHz square wave input
10 <–> 90%
Test Conditions
Test Conditions
Note 2
Note 5
–
–
–
–
–
–
–
–
2.0 pF load
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