HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 59

• Manufacturer Part Number: HBLXT9763HC.C4
• Manufacturer: Intel

Specifications of HBLXT9763HC.C4

• Lead Free Status / RoHS Status: Not Compliant

4.0
Datasheet
Address
Table 36. Register Set
21-27
10
15
16
17
18
19
20
28
29
30
31
0
1
2
3
4
5
6
7
8
9
Register Definitions
The LXT9763 register set includes multiple 16-bit registers. Refer to
register listing and to
additional details.
Control Register
Status Register
PHY Identification Register 1
PHY Identification Register 2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Base Page Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page Transmit Register
Auto-Negotiation Link Partner Received Next Page Register
1000BASE-T/100BASE-T2 Control Register
1000BASE-T/100BASE-T2 Status Register
Extended Status Register
Port Configuration Register
Quick Status Register
Interrupt Enable Register
Interrupt Status Register
LED Configuration Register
Reserved
Transmit Control Register #1
Reserved
Transmit Control Register #2
Reserved
•
•
Base registers (0 through 8) are defined in accordance with the “Reconciliation Sublayer and
Media Independent Interface” and “Physical Layer Link Signaling for 10/100 Mbps Auto-
Negotiation” sections of the IEEE 802.3 specification.
Additional registers (16 through 30) are defined in accordance with the IEEE 802.3
specification for adding unique chip functions.
Table 37
Register Name
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
for a complete bit map.
Table 38
through
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Not Implemented
Not Implemented
Not Implemented
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Table 36
Table 53
Table 38 on page 62
Table 39 on page 62
Table 40 on page 63
Table 41 on page 64
Table 42 on page 64
Table 43 on page 65
Table 44 on page 66
Table 45 on page 67
Table 46 on page 67
Table 47 on page 68
Table 48 on page 68
Table 49 on page 69
Table 50 on page 70
Table 51 on page 71
Table 52 on page 72
Table 53 on page 72
Bit Assignments
for a complete
provide
59