HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 53
HBLXT9763HC.C4
Manufacturer Part Number
HBLXT9763HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9763HC.C4.pdf
(74 pages)
Specifications of HBLXT9763HC.C4
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RXD, RX_DV, RX_ER setup to RX_CLK High
RXD, RX_DV, RX_ER hold from RX_CLK High
TPFI in to RXD out (Rx latency)
CRS asserted to RXD, RX_DV, RX_ER asserted
RXD, RX_DV, RX_ER de-asserted to CRS de-asserted
TPFI in to CRS asserted
TPFI quiet to CRS de-asserted
TPFI in to COL asserted
TPFI quiet to COL de-asserted
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
2. CRS is asserted. RXD/RX_DV are driven at the start of SFD (64 BT).
RX_CLK
RX_DV,
RX_ER
Figure 26. 10BASE-T Receive Timing
Table 28. 10BASE-T Receive Timing Parameters
RXD,
TPFI
CRS
COL
Parameter
t
6
t
8
t
3
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
t
4
Sym
t1
t2
t3
t4
t5
t6
t7
t8
t9
t
1
Min
10
10
–
–
–
–
–
–
–
t
2
Typ
6.6
2.5
18
12
12
–
–
1
3
1
Max
–
–
–
–
–
–
–
–
–
Units
t
t
BT
BT
BT
BT
BT
BT
BT
ns
ns
7
9
Test Conditions
t
5
–
–
–
–
–
–
–
–
–
53
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