IDT82V1671J IDT, Integrated Device Technology Inc, IDT82V1671J Datasheet - Page 31

• Manufacturer Part Number: IDT82V1671J
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V1671J

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: PLCC
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Not Compliant

Table - 8 FSK Modulation Characteristics
Signal, which is a string of '01' pairs. Then a Mark Signal which is a
string of ‘1’ follows. The Caller ID information comes after the Mark
Signal. Between two bytes of the Caller ID information, a Flag Signal
Caller ID data are programmable by register GREG21, GREG22,
GREG19 and GREG20, respectively.
the Caller ID information. If the length of the information is less than 64
bytes, all information bytes can be written to the FSK-RAM at one time.
If the length of the information is longer than 64 bytes, the information
should be divided into two or more segments according to its actual
length (each segment ≤ 64 bytes). Write one segment to the FSK-RAM
at one time. When this segment has been sent out, the FSK-RAM can
be updated with the next segment. Repeat the same operation until all
segments have been sent out. Refer to
RAM” on page 60
or GCI interface.
in the following:
generator. The FSK_EN bit must be set to 1 to enable the FSK
generator before FSK transmission starts. When the transmission is
finished, the FSK_EN bit should be set to 0 to disable the FSK
generator.
send FSK signal (the FSK generator is shared by four channels).
modulation standards BELL 202 and ITU-T V.23.
the FSK_TS bit is set to 1, the FSK generator begins to send the data
RSLIC & CODEC CHIPSET
Generally, the transmission of the FSK signal starts with a Seizure
The lengths of the Seizure Signal, Mark Signal, Flag Signal and
The CODEC provides total 64 bytes RAM (called FSK-RAM) to store
The FSK generator is controlled by register GREG23, as described
- Bit FSK_EN. This bit is used to enable or disable the FSK
- Bits FSK_CS[1:0]. These two bits are used to select a channel to
- Bit FSK_BS. This bit is used to select one of the two FSK
- Bit FSK_TS. This bit is used to start the FSK transmission. Once
FSK_TS
Transmit
Signal
In this example, Seizure Length = 32(d) (FSK_SL[7:0] = 16(d));
Transmission Rate
Space (Logic 0)
Characteristic
Mark (Logic 1)
for further details on accessing the FSK-RAM via MPI
Data Format
Modulation
Flag Length = 8(d) (FSK_FL[7:0] = 8(d));
Seizure Signal
“5.2.4 Addressing the FSK-
Figure - 15 FSK Signal Transmission Sequence
Mark Length = 32(d) (FSK_ML[7:0] = 32(d));
Data Length = 4(d) (FSK_DL[7:0] = 4(d)).
1300 ± 3 Hz
2100 ± 3 Hz
ITU-T V.23
Mark Signal
31
which is a string of '1' is inserted so that the receiver can have enough
time to process the received bytes. The transmission sequence of the
FSK signal is shown in
written in the FSK-RAM automatically, following the procedure shown
below:
output a mark-after-send signal (a string of ‘1’) after the data in the FSK-
RAM has been sent out. If total Caller ID information is longer than 64
bytes, the FSK_MAS bit should be set to 1. After sending out one
segment, the FSK generator will keep sending out a mark-after-send
signal to hold the established communication channel for sending the
remaining segment(s). After all segments have been sent out, the
FSK_MAS bit should be set to 0 so that the output of the FSK generator
will be muted. Once the FSK_MAS bit is 0, changing it from 0 to 1 will
not make the mark-after-send signal active until a new transmission
starts (FSK_TS = 1).
should be set to 0 so that the output will be muted after all information
has been sent out.
RAM via MPI or GCI interface with MSB first; but the FSK codes are
sent out by the FSK generator through the selected channel with LSB
first.
Step 1: Start, send Seizure Signal;
Step 2: Send Mark Signal;
Step 3: Send one start bit (0), one byte of data in the FSK-RAM,
Step 4: Check whether all data in the FSK-RAM has been sent out.
- Bit FSK_MAS. This bit determines whether the FSK generator will
If total Caller ID information is less than 64 bytes, the FSK_MAS bit
Note that the Caller ID information is read from or written to the FSK-
Start Bit
Serial binary asynchronous
one stop bit (1), then send Flag Signal;
If it has, set the FSK_TS bit to 0 and stop, otherwise return
to step 3.
Data
Byte
1200 ± 6 baud
Stop Bit
Signal
Flag
FSK
Start Bit
Figure -
IDT82V1671/IDT82V1671A, IDT82V1074
Data
Byte
Stop Bit
15.
Signal
Flag
Start Bit
Data
Byte
1200 ± 3 Hz
2200 ± 3 Hz
BELL 202
Stop Bit
Signal
Flag
Start Bit
Data
Byte
Stop Bit
Signal
Flag