PEB3265FV15XP Infineon Technologies, PEB3265FV15XP Datasheet - Page 140
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PEB3265FV15XP
Manufacturer Part Number
PEB3265FV15XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3265FV15XP.pdf
(383 pages)
Specifications of PEB3265FV15XP
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
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Preliminary
highway assignment for each DuSLIC channel can be programmed. Receive and
transmit time slots can also be programmed individually.
When DuSLIC is transmitting data on DXA (DXB), pin TCA (TCB) is activated to control
an external driving device.
The DRA/B and DXA/B pins may be connected to form a bidirectional data pin for special
purposes, e.g., for the Serial Interface Port (SIP) with the Subscriber Line Data (SLD)
bus. The SLD approach provides a common interface for analog or digital per-line
components. For more details, please see the “ICs for Communications”
Manual available from Infineon Technologies on request.
Table 37
possible.
Table 37
Clock Rate PCLK
[kHz]
128
256
256
512
512
768
768
1024
1024
2048
2048
4096
4096
8192
8192
f
f
1)
Data Sheet
Valid PCLK clock rates are:
Ordering No. B115-H6377-X-X-7600, published by Infineon Technologies.
shows PCM interface examples; other frequencies (e.g., 1536 kHz) are also
SLICOFI-2x PCM Interface Configuration
Single/Double
Clock [1/2]
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
f
= n
64 kHz (2
n
128)
Time Slots
[per highway]
2
2
4
4
8
6
12
8
16
16
32
32
64
64
128
f/64
f/128
140
Data Rate
[kbit/s per highway]
128
128
256
256
512
384
768
512
1024
1024
2048
2048
4096
4096
8192
f
f/2
Interfaces
2000-07-14
1)
DuSLIC
User’s
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