PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 203

• Manufacturer Part Number: PIC16LF1847-E/ML
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad
• Core: PIC
• Processor Series: PIC16LF
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 32 MHz
• Data Ram Size: 256 B
• Number Of Programmable I/os: 15
• Number Of Timers: ÿ4 x 8-bit, 1 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: Through Hole
• Interface Type: SPI, I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 23-4:
TABLE 23-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
Name
MDCARH
MDCARL
MDCON
MDSRC
Legend:
MDCLODIS
R/W-x/u
Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
MDMSODIS
— = unimplemented, read as ‘0’. Shaded cells are not used in the Data Signal Modulator mode.
MDCHODIS
MDCLODIS
MDEN
Bit 7
MDCLODIS: Modulator Low Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
0 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
MDCLPOL: Modulator Low Carrier Polarity Select bit
1 = Selected low carrier signal is inverted
0 = Selected low carrier signal is not inverted
MDCLSYNC: Modulator Low Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high
0 = Modulator Output is not synchronized to the low time carrier signal
Unimplemented: Read as ‘0’
MDCL<3:0> Modulator Data High Carrier Selection bits
1111 = Reserved. No channel connected.
1000 = Reserved. No channel connected.
0111 = CCP4 output (PWM Output mode only)
0110 = CCP3 output (PWM Output mode only)
0101 = CCP2 output (PWM Output mode only)
0100 = CCP1 output (PWM Output mode only)
0011 = Reference Clock module signal
0010 = MDCIN2 port pin
0001 = MDCIN1 port pin
0000 = V
MDCLPOL
SUMMARY OF REGISTERS ASSOCIATED WITH DATA SIGNAL MODULATOR MODE
R/W-x/u
is disabled
is enabled
time carrier
•
•
•
MDCARL: MODULATION LOW CARRIER CONTROL REGISTER
MDCHPOL
MDCLPOL
SS
MDOE
Bit 6
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
MDCLSYNC
R/W-x/u
MDCHSYNC
MDCLSYNC
MDSLR
Bit 5
—
U-0
Preliminary
—
MDOPOL
Bit 4
—
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-x/u
MDOUT
Bit 3
(1)
Bit 2
R/W-x/u
—
MDCH<3:0>
MDMS<3:0>
MDCL<3:0>
PIC16(L)F1847
MDCL<3:0>
(1)
Bit 1
—
R/W-x/u
MDBIT
DS41453B-page 203
Bit 0
R/W-x/u
Register
on Page
202
203
200
201
bit 0