PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 296

• Manufacturer Part Number: PIC16LF1847-E/ML
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad
• Core: PIC
• Processor Series: PIC16LF
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 32 MHz
• Data Ram Size: 256 B
• Number Of Programmable I/os: 15
• Number Of Timers: ÿ4 x 8-bit, 1 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: Through Hole
• Interface Type: SPI, I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
26.2
The factory calibrates the internal oscillator block out-
put (INTOSC). However, the INTOSC frequency may
drift as V
affects the asynchronous baud rate. Two methods may
be used to adjust the baud rate clock, but both require
a reference clock source of some kind.
REGISTER 26-1:
DS41453B-page 298
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-/0
CSRC
Clock Accuracy with
Asynchronous Operation
DD
SREN/CREN overrides TXEN in Sync mode.
or temperature changes, and this directly
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 =
0 =
TX9: 9-bit Transmit Enable bit
1 =
0 =
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: Ninth bit of Transmit Data
Can be address/data bit or a parity bit.
R/W-0/0
TX9
Master mode (clock generated internally from BRG)
Slave mode (clock from external source)
Selects 9-bit transmission
Selects 8-bit transmission
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
W = Writable bit
‘0’ = Bit is cleared
x = Bit is unknown
R/W-0/0
TXEN
(1)
(1)
R/W-0/0
SYNC
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SENDB
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output. Adjusting the
value in the OSCTUNE register allows for fine resolution
changes to the system clock source. See
“Internal Clock Sources”
The other method adjusts the value in the Baud Rate
Generator. This can be done automatically with the
Auto-Baud
“Auto-Baud
resolution when adjusting the Baud Rate Generator to
compensate for a gradual change in the peripheral
clock frequency.
Detect
Detect”). There may not be fine enough
R/W-0/0
BRGH
feature
 2011 Microchip Technology Inc.
for more information.
TRMT
R-1/1
(see
Section 26.3.1
Section 5.2.2
R/W-0/0
TX9D
bit 0