PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 402

• Manufacturer Part Number: PIC16LF1847-E/ML
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ mTouch™ 16Fr

Specifications of PIC16LF1847-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad
• Core: PIC
• Processor Series: PIC16LF
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 32 MHz
• Data Ram Size: 256 B
• Number Of Programmable I/os: 15
• Number Of Timers: ÿ4 x 8-bit, 1 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: Through Hole
• Interface Type: SPI, I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1847
Timer1 ............................................................................... 179
Timer2
Timer2/4/6 ......................................................................... 191
Timers
Timing Diagrams
DS41453B-page 404
Associated Registers ................................................ 177
Operation .................................................................. 175
Specifications ............................................................ 368
Associated registers.................................................. 189
Asynchronous Counter Mode ................................... 181
Clock Source Selection ............................................. 180
Interrupt..................................................................... 183
Operation .................................................................. 180
Operation During Sleep ............................................ 183
Oscillator ................................................................... 181
Prescaler ................................................................... 181
Specifications ............................................................ 368
Timer1 Gate
TMR1H Register ....................................................... 179
TMR1L Register ........................................................ 179
Associated registers.................................................. 194
Associated registers.................................................. 194
Timer1
Timer2/4/6
A/D Conversion ......................................................... 370
A/D Conversion (Sleep Mode) .................................. 370
Acknowledge Sequence ........................................... 272
Asynchronous Reception .......................................... 296
Asynchronous Transmission ..................................... 292
Asynchronous Transmission (Back to Back) ............ 293
Auto Wake-up Bit (WUE) During Normal Operation . 308
Auto Wake-up Bit (WUE) During Sleep .................... 308
Automatic Baud Rate Calibration .............................. 306
Baud Rate Generator with Clock Arbitration ............. 265
BRG Reset Due to SDA Arbitration During Start
Brown-out Reset (BOR) ............................................ 366
Brown-out Reset Situations ........................................ 77
Bus Collision During a Repeated Start Condition
Bus Collision During a Repeated Start Condition
Bus Collision During a Start Condition (SCL = 0) ..... 276
Bus Collision During a Stop Condition (Case 1) ....... 279
Bus Collision During a Stop Condition (Case 2) ....... 279
Bus Collision During Start Condition (SDA only) ...... 275
Bus Collision for Transmit and Acknowledge............ 274
CLKOUT and I/O....................................................... 364
Clock Synchronization .............................................. 262
Clock Timing ............................................................. 362
Comparator Output ................................................... 165
Enhanced Capture/Compare/PWM (ECCP) ............. 368
Fail-Safe Clock Monitor (FSCM) ................................. 66
First Start Bit Timing ................................................. 266
Full-Bridge PWM Output ........................................... 219
Half-Bridge PWM Output .................................. 217, 224
I
I
I
I
2
2
2
2
C Bus Data ............................................................. 376
C Bus Start/Stop Bits.............................................. 375
C Master Mode (7 or 10-Bit Transmission) ............ 269
C Master Mode (7-Bit Reception) ........................... 271
Reading and Writing ......................................... 181
Selecting Source............................................... 181
T1CON.............................................................. 187
T1GCON ........................................................... 188
TXCON ............................................................. 193
Condition........................................................... 276
(Case 1) ............................................................ 277
(Case 2) ............................................................ 278
Preliminary
Timing Diagrams and Specifications
Timing Parameter Symbology .......................................... 361
Timing Requirements
TMR0 Register.................................................................... 29
TMR1H Register ................................................................. 29
TMR1L Register.................................................................. 29
TMR2 Register.............................................................. 29, 37
TRIS.................................................................................. 346
TRISA Register........................................................... 30, 122
TRISB ............................................................................... 126
TRISB Register........................................................... 30, 127
Two-Speed Clock Start-up Mode........................................ 63
TXCON (Timer2/4/6) Register .......................................... 193
TxCON Register ............................................................... 213
TXREG ............................................................................. 291
TXREG Register ................................................................. 32
TXSTA Register.......................................................... 32, 298
U
USART
V
V
W
Wake-up on Break ............................................................ 307
Wake-up Using Interrupts ................................................. 100
Watchdog Timer (WDT)...................................................... 78
WCOL ....................................................... 265, 268, 270, 272
REF
I
INT Pin Interrupt ......................................................... 87
Internal Oscillator Switch Timing ................................ 61
PWM Auto-shutdown ................................................ 223
PWM Direction Change ............................................ 220
PWM Direction Change at Near 100% Duty Cycle... 221
PWM Output (Active-High) ....................................... 215
PWM Output (Active-Low) ........................................ 216
Repeat Start Condition ............................................. 267
Reset Start-up Sequence ........................................... 79
Reset, WDT, OST and Power-up Timer ................... 365
Send Break Character Sequence ............................. 309
SPI Master Mode (CKE = 1, SMP = 1) ..................... 373
SPI Mode (Master Mode).......................................... 239
SPI Slave Mode (CKE = 0) ....................................... 374
SPI Slave Mode (CKE = 1) ....................................... 374
Synchronous Reception (Master Mode, SREN) ....... 314
Synchronous Transmission ...................................... 311
Synchronous Transmission (Through TXEN) ........... 311
Timer0 and Timer1 External Clock ........................... 367
Timer1 Incrementing Edge ....................................... 183
Two Speed Start-up.................................................... 64
USART Synchronous Receive (Master/Slave) ......... 372
USART Synchronous Transmission (Master/Slave). 372
Wake-up from Interrupt............................................. 100
PLL Clock ................................................................. 363
I
SPI Mode .................................................................. 375
BRGH Bit .................................................................. 301
Synchronous Master Mode
Modes ....................................................................... 102
Specifications ........................................................... 367
. S
2
2
C Stop Condition Receive or Transmit Mode......... 273
C Bus Data............................................................. 377
EE
Firmware Restart .............................................. 222
Requirements, Synchronous Receive .............. 372
Requirements, Synchronous Transmission...... 372
Timing Diagram, Synchronous Receive ........... 372
Timing Diagram, Synchronous Transmission... 372
ADC Reference Voltage
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