PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 233

14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan

PIC16LF1847-E/ML

Manufacturer Part Number
PIC16LF1847-E/ML
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet

Specifications of PIC16LF1847-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad
Core
PIC
Processor Series
PIC16LF
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
Number Of Programmable I/os
15
Number Of Timers
ÿ4 x 8-bit, 1 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
Through Hole
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
25.0
25.1
The Master Synchronous Serial Port (MSSPx) module
is a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSPx module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy chain connection of slave devices
Figure 25-1
module.
FIGURE 25-1:
 2011 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT (MSSP1 AND
MSSP2) MODULE
Master SSPx (MSSPx) Module
Overview
is a block diagram of the SPI interface
MSSPX BLOCK DIAGRAM (SPI MODE)
2
C™)
SCKx
SDOx
SDIx
SSx
Read
SSx Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSPxBUF Reg
SSPxSR Reg
SSPM<3:0>
4
Clock
Shift
Write
(
(SSPxADD)
Prescaler
Data Bus
Baud Rate
TMR2 Output
4, 16, 64
Generator
2 (CKP, CKE)
2
Clock Select
T
OSC
PIC16(L)F1847
)
DS41453B-page 233

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