AM50DL128CG70I AMD (ADVANCED MICRO DEVICES), AM50DL128CG70I Datasheet - Page 35

• Manufacturer Part Number: AM50DL128CG70I
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM50DL128CG70I

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
34
Standard
Suspend
Mode
Erase
Mode
Refer to the section on DQ5 for more information.
details.
is in progress. The device outputs array data if the system addresses a non-busy bank.
Embedded Program Algorithm
Embedded Erase Algorithm
Erase-Suspend-Program
Erase-Suspend-
Read
Status
Erase
Suspended Sector
Non-Erase
Suspended Sector
Table 12. Write Operation Status
P R E L I M I N A R Y
(Note 2)
Am50DL128CG
DQ7#
DQ7#
Data
DQ7
0
1
No toggle
Toggle
Toggle
Toggle
Data
DQ6
(Note 1)
DQ5
Data
0
0
0
0
Data
DQ3
N/A
N/A
N/A
1
No toggle
(Note 2)
Toggle
Toggle
Data
DQ2
N/A
November 7, 2002
RY/BY#
0
0
1
1
0