AM50DL128CG70I AMD (ADVANCED MICRO DEVICES), AM50DL128CG70I Datasheet - Page 53
AM50DL128CG70I
Manufacturer Part Number
AM50DL128CG70I
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM50DL128CG70I.pdf
(63 pages)
Specifications of AM50DL128CG70I
Lead Free Status / RoHS Status
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pSRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. t
2. If CE#, LB#, or UB# goes low at the same time or before
52
Parameter
Symbol
the outputs achieve the open circuit condition and are
not referenced to output voltage levels.
WE# goes high, the outputs will remain at high impedance.
OD,
t
t
t
t
t
t
t
ODO
t
t
t
ACC
t
t
COE
OEE
t
t
t
t
AOH
CO
OD
OH
PM
RC
OE
BA
BE
BD
PC
AA
DQ15 to DQ0
t
ODo
Addresses
A20 to A0
LB#, UB#
, t
BD
CE#1
D
WE#
OE#
CE2
, and t
OUT
Description
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold from Address Change
Page Mode Time
Page Mode Cycle Time
Page Mode Address Access Time
Page Output Data Hold Time
ODW
are defined as the time at which
High-Z
Figure 27. Pseudo SRAM Read Cycle
t
ACC
P R E L I M I N A R Y
t
COE
t
CO
t
OEE
Am50DL128CG
t
t
BE
OE
t
BA
Indeterminate
3. If CE#, LB#, or UB# goes low at the same time or after WE#
t
RC
goes low, the outputs will remain at high impedance.
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Valid Data Out
70
70
70
70
Speed
t
BD
25
25
10
20
20
20
10
70
30
30
10
0
0
t
ODO
t
OD
t
OH
November 7, 2002
85
85
85
85
Fixed High
High-Z
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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