AM50DL128CG70I AMD (ADVANCED MICRO DEVICES), AM50DL128CG70I Datasheet - Page 52

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AM50DL128CG70I

Manufacturer Part Number
AM50DL128CG70I
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM50DL128CG70I

Lead Free Status / RoHS Status
Supplier Unconfirmed
FLASH AC CHARACTERISTICS
November 7, 2002
Notes:
1. Figure indicates last two bus cycles of a program or erase operation.
2. PA = program address, SADD = sector address, PD = program data.
3. DQ7# is the complement of the data written to the device. D
4. CE#f refers to active flash device being addressed (either CE#f1 or CE#f2). The chip enable input of the inactive flash device must
5. Waveforms are for the word mode.
be held high during this operation.
Figure 26. Flash Alternate CE#f Controlled Write (Erase/Program) Operation Timings
Addresses
RESET#
RY/BY#
CE#f
WE#
Data
OE#
t
RH
555 for program
2AA for erase
t
t
t
WS
WH
WC
A0 for program
55 for erase
t
GHEL
P R E L I M I N A R Y
t
t
t
DS
CP
PA for program
SADD for sector erase
555 for chip erase
CPH
t
AS
t
DH
Am50DL128CG
t
AH
OUT
PD for program
30 for sector erase
10 for chip erase
is the data written to the device.
t
BUSY
t
WHWH1 or 2
Data# Polling
DQ7#
PA
D
OUT
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