NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 674
NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
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18.1.17
18.1.18
18.1.19
674
PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 28h–2Bh
Default Value:
PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 2Ch–2Fh
Default Value:
CAPP—Capabilities List Pointer Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 34h
Default Value:
31:0
31:0
7:0
Bit
Bit
Bit
Prefetchable Memory Base Upper Portion (PMBU) — R/W. This field contains the
Upper 32-bits of the prefetchable address base.
Prefetchable Memory Limit Upper Portion (PMLU) — R/W. This field contains the
Upper 32-bits of the prefetchable address limit.
Capabilities Pointer (PTR) — RO. This field indicates that the pointer for the first
entry in the capabilities list is at 40h in configuration space.
00000000h
00000000h
40h
PCI Express* Configuration Registers (Desktop and Mobile Only)
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Intel
R/W
32 bits
R/W
32 bits
R0
8 bits
®
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