876784 Intel, 876784 Datasheet - Page 340

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

8.3.17
8.3.18
8.3.19
340
RMCP_SNUM—RMCP Sequence Number Register
(ASF Controller—B1:D8:F0)
Offset Address: F4h
Default Value:
This register is a means for software to read the current sequence number that
hardware is using in RMCP packets. Software can also change the value. Software
should only write to this register while the GLOBAL ENABLE is off.
SP_MODE—Special Modes Register
(ASF Controller—B1:D8:F0)
Offset Address: F5h
Default Value:
The register contains miscellaneous functions.
INPOLL_TCONF—Inter-Poll Timer Configuration Register
(ASF Controller—B1:D8:F0)
Offset Address: F6h
Default Value:
This register is used to load and hold the value (in increments of 5 ms) for the polling
timer. This value determines how often the ASF polling timer expires which determines
the minimum idle time between sensor polls.
4:0
7:0
7:0
Bit
Bit
Bit
7
6
5
SMBus Activity Bit (SPE_ACT) — RO.
1 = ASF controller is active with a SMBus transaction. This is an indicator to software
Watchdog Status (SPE_WDG) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = This bit is set when a watchdog expiration occurs.
Link Loss Status (SPE_LNK) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = This bit is set when a link loss occurs (link is down for more than 5 seconds).
Reserved
Inter-Poll Timer Configuration (IPTC_VAL) — R/W. This field identifies the time, in
5.24 ms units that the ASF controller will wait between the end of the one ASF Poll Alert
Message to start on the next. The value 00h is invalid and unsupported.
RMCP Sequence Number (RSEQ_VAL) — R/W. This is the current sequence number
of the RMCP packet being sent or the sequence number of the next RMCP packet to be
sent. This value can be set by software. At reset, it defaults to 00h. If the sequence
number is not FFh, the ASF controller will automatically increment this number by one
(or rollover to 00h if incrementing from FEh) after a successful RMCP packet
transmission.
that the ASF controller is still processing commands on the SMBus.
00h
x0h
10h
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Intel
R/W
8 bits
R/WC, RO
8 bits
R/W
8 bits
®
ICH7 Family Datasheet