876784 Intel, 876784 Datasheet - Page 725

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

Intel® High Definition Audio Controller Registers (D27:F0)
19.1.44
19.1.45
Intel
®
ICH7 Family Datasheet
VCiCAP—VCi Resource Capability Register
(Intel
Address Offset: 11Ch–11Fh
Default Value:
VCiCTL—VCi Resource Control Register
(Intel
Address Offset: 120h–123h
Default Value:
31:24
22:16
30:27
26:24
23:20
19:17
13:8
15:8
7:0
7:0
Bit
Bit
23
15
14
31
16
Port Arbitration Table Offset — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
Reserved.
Maximum Time Slots — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
Reject Snoop Transactions — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
Advanced Packet Switching — RO. Hardwired to 0 since this field is not valid for
endpoint devices.
Reserved
Port Arbitration Capability — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
VCi Enable — R/W.
0 = VCi is disabled
1 = VCi is enabled
NOTE: This bit is not reset on D3
Reserved.
VCi ID — R/W. This field assigns a VC ID to the VCi resource. This field is not used by
the Intel
Reserved.
Port Arbitration Select — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
Load Port Arbitration Table — RO. Hardwired to 0 since this field is not valid for endpoint
devices.
Reserved.
TC/VCi Map — R/W, RO. This field indicates the TCs that are mapped to the VCi
resource. Bit 0 is hardwired to 0 indicating that it cannot be mapped to VCi. Bits [7:1]
are implemented as R/W bits. This field is not used by the ICH7 hardware, but it is R/W
to avoid confusing software.
®
®
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
®
00000000h
00000000h
ICH7 hardware, but it is R/W to avoid confusing software.
HOT
Description
Description
to D0 transition; however, it is reset by PLTRST#.
Attribute:
Size:
Attribute:
Size:
RO
32 bits
R/W, RO
32 bits
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